Signed-off-by: Matthew Ballance <matt.ballance@gmail.com>
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@ -1520,14 +1520,22 @@ class TaskVisitor final : public VNVisitor {
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if (m_inNew) {
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AstVar* varp = outvscp->varp();
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varp->funcLocal(true);
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// Create a new var that will be inside the lambda
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AstVar* newvarp = varp->cloneTree(false);
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newvarp->funcLocal(true);
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// Replace all references so they point to the new var
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lambdap->stmtsp()->foreachAndNext([varp, newvarp](AstVarRef* refp) {
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if (refp->varp() == varp) refp->varp(newvarp);
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// Create a new VarScope for the new variable
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AstVarScope* const newvscp
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= new AstVarScope{newvarp->fileline(), m_scopep, newvarp};
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m_scopep->addVarsp(newvscp);
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// Replace all references so they point to the new var and varscope
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lambdap->stmtsp()->foreachAndNext([outvscp, newvscp](AstVarRef* refp) {
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if (refp->varScopep() == outvscp) {
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refp->varScopep(newvscp);
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refp->varp(newvscp->varp());
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}
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});
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// Add variable initialization
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@ -0,0 +1,26 @@
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// DESCRIPTION: Verilator: DPI stub for t_dpi_inline_new
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2025 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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// Include the Verilator-generated DPI header so the C prototype matches
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// the SystemVerilog import expectations.
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#include "Vt_dpi_inline_new__Dpi.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Stub implementation for _pyhdl_if_PyTuple_GetItem used by pyhdl_if package.
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// Returns a null pointer; the SystemVerilog test only checks that the call
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// compiles and links.
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void* _pyhdl_if_PyTuple_GetItem(void* p0, unsigned long long idx) {
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(void)p0;
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(void)idx;
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return 0;
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}
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#ifdef __cplusplus
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}
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#endif
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@ -0,0 +1,19 @@
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2025 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('simulator')
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# Compile the SystemVerilog test with the DPI C stub.
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test.compile(v_flags2=["t/t_dpi_inline_new.cpp"])
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test.execute()
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test.passes()
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@ -0,0 +1,51 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// Copyright 2025 by Wilson Snyder. This program is free software; you can
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// redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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package pyhdl_if;
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typedef chandle PyObject;
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import "DPI-C" context function PyObject _pyhdl_if_PyTuple_GetItem(input PyObject p0,
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input longint unsigned p1);
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function PyObject PyTuple_GetItem(input PyObject p0, input longint unsigned p1);
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return _pyhdl_if_PyTuple_GetItem(p0, p1);
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endfunction
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class py_object;
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function new(PyObject obj);
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endfunction
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endclass
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class py_tuple;
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function py_object get_item(int idx);
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py_object ret = new(PyTuple_GetItem(null, longint'(idx)));
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return ret;
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endfunction
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endclass
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endpackage
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module t (/*AUTOARG*/
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// Inputs
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clk
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);
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input clk;
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import pyhdl_if::*;
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initial begin
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py_tuple t0 = new;
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py_object o;
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o = t0.get_item(1);
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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