Commentary: Changes update

Changes

@@ -19,8 +19,14 @@ Verilator 5.023 devel
 
 **Minor:**
 
-* Fix invalid cast on string structure creation (#4921). [esynr3z]
+* Add DFG 'regularize' pass, and improve variable removal (#4937). [Geza Lore]
+* Support public packed struct / union (#860) (#4878). [Kefa Chen]
+* Change installation to be relocatable (#4927). [Geza Lore]
 * Fix __Vlip undefined error in --freloop (#4824). [Justin Yao Du]
+* Fix invalid cast on string structure creation (#4921). [esynr3z]
+* Fix try-lock spuriously fails (#4931) (#4938). [Kamil Rakoczy]
+* Fix V3Unknown unpacked struct x-assign (#4934). [Yan Xu]
+* Fix DFG removing forceable signals (#4942). [Geza Lore]
 
 
 Verilator 5.022 2024-02-24

docs/guide/warnings.rst

@@ -1346,7 +1346,7 @@ List Of Warnings
 
    .. code-block:: sv
       :linenos:
-      :emphasize-lines: 5-6
+      :emphasize-lines: 2
 
        `define ZERO 0
        `ifdef (ZERO || ZERO)  //<--- warning PREPROCZERO

docs/spelling.txt

@@ -438,6 +438,7 @@ Verilog
 Vighnesh
 Viktor
 Vilp
+Vlip
 Vm
 Vukobratovic
 Wai
@@ -461,6 +462,7 @@ Xiaoliang
 Xiaoyi
 Xuan
 Xuanqi
+Yao
 Yazdanbakhsh
 Yernagula
 Yi
@@ -639,6 +641,7 @@ envvar
 eof
 errae
 erroring
+esynr
 et
 eval
 evals
@@ -670,6 +673,7 @@ foreach
 fprintf
 fprofile
 fread
+freloop
 frewind
 fs
 fscanf
@@ -965,8 +969,11 @@ sv
 svBitVal
 svBitVecVal
 svGet
+svGetTime
+svGetTimePrecision
 svLogicVal
 svdpi
+svgGetTimeUnit
 swrite
 sys
 systemc