mirror of
https://github.com/verilator/verilator.git
synced 2026-10-06 10:03:44 +02:00
When using a "if" statement inside an always block, part of the code may be unreachable. This can be used to avoid errors, but it generated an error, this commit demotes this to a warning. Partly fixes #2625.
This commit is contained in:
+2
-2
@@ -804,8 +804,8 @@ private:
|
||||
}
|
||||
// We're extracting, so just make sure the expression is at least wide enough.
|
||||
if (nodep->fromp()->width() < width) {
|
||||
nodep->v3error("Extracting " << width << " bits from only "
|
||||
<< nodep->fromp()->width() << " bit number");
|
||||
nodep->v3warn(SELRANGE, "Extracting " << width << " bits from only "
|
||||
<< nodep->fromp()->width() << " bit number");
|
||||
// Extend it.
|
||||
AstNodeDType* subDTypep
|
||||
= nodep->findLogicDType(width, width, nodep->fromp()->dtypep()->numeric());
|
||||
|
||||
Reference in New Issue
Block a user