Improve documentation for BADVLTPRAGMA

docs/gen/ex_BADVLTPRAGMA_faulty.rst

@@ -0,0 +1,5 @@
+.. comment: generated by t_lint_badvltpragma_bad
+.. code-block:: sv
+   :emphasize-lines: 1
+
+      // verilator lintt_off WIDTH  //<--- Warning (lint_off misspelled)

docs/gen/ex_BADVLTPRAGMA_msg.rst

@@ -0,0 +1,7 @@
+.. comment: generated by t_lint_badvltpragma_bad
+.. code-block::
+   :emphasize-lines: 1,2
+
+   %Error-BADVLTPRAGMA: example.v:1:4 Unknown verilator comment: '/*verilator lintt_off WIDTH <--- Warning (lint_off misspelled)*/'
+       7 |    /*verilator lintt_off WIDTH <--- Warning (lint_off misspelled)*/
+         |    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

docs/guide/warnings.rst

@@ -175,6 +175,14 @@ List Of Warnings
    An error that a `/*verilator ...*/` metacomment pragma is badly formed
    or not understood.
 
+   Faulty example:
+
+   .. include:: ../../docs/gen/ex_BADVLTPRAGMA_faulty.rst
+
+   Results in:
+
+   .. include:: ../../docs/gen/ex_BADVLTPRAGMA_msg.rst
+
    This error may be disabled with a lint_off BADVLTPRAGMA metacomment.
 
 

test_regress/driver.py

@@ -2633,6 +2633,7 @@ class VlTest:
                 fhw.write("   :emphasize-lines: " + emph + "\n")
             fhw.write("\n")
             for line in out:
+                line = re.sub(r' +$', '', line)
                 fhw.write(line)
 
         self.files_identical(temp_fn, out_filename)

test_regress/t/t_dist_error_format.py

@@ -29,6 +29,7 @@ def formats():
             for line in wholefile.splitlines():
                 lineno += 1
                 line = re.sub(r'(\$display|\$write).*\".*%(Error|Warning)', '', line)
+                line = re.sub(r'<---.*', '', line)
                 if (re.search(r'(Error|Warning)', line)
                         and not re.search(r'^\s*<sformatf ', line)  # skip XML tag
                         and not re.search(r'^\s*{"type":"', line)  # skip JSON node
@@ -52,14 +53,16 @@ def formats():
                         #print("FF "+filename+": "+line)
                         fline = filename + ":" + str(lineno)
                         warns[fline] = "Non-standard warning/error: " + fline + ": " + line
+                        if test.verbose:
+                            print(warns[fline])
 
     if not lnmatch:
         test.error("Check line number regexp is correct, no matches")
     if len(warns):
         # First warning lists everything as that's shown in the driver summary
-        test.error(' '.join(sorted(warns.keys())))
+        test.error_keep_going(' '.join(sorted(warns.keys())))
         for filename in sorted(warns.keys()):
-            test.error(warns[filename])
+            test.error_keep_going(warns[filename])
 
 
 if not os.path.exists(root + "/.git"):

test_regress/t/t_lint_badvltpragma_bad.out

@@ -0,0 +1,5 @@
+%Error-BADVLTPRAGMA: t/t_lint_badvltpragma_bad.v:7:4: Unknown verilator comment: '/*verilator lintt_off WIDTH <--- Warning (lint_off misspelled)*/'
+    7 |    /*verilator lintt_off WIDTH <--- Warning (lint_off misspelled)*/ 
+      |    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+                     ... For error description see https://verilator.org/warn/BADVLTPRAGMA?v=latest
+%Error: Exiting due to

test_regress/t/t_lint_badvltpragma_bad.py

@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(fails=True, expect_filename=test.golden_filename)
+
+test.extract(in_filename=test.top_filename,
+             out_filename="../docs/gen/ex_BADVLTPRAGMA_faulty.rst",
+             lines="7")
+
+test.extract(in_filename=test.golden_filename,
+             out_filename="../docs/gen/ex_BADVLTPRAGMA_msg.rst",
+             lines="1-3")
+
+test.passes()

test_regress/t/t_lint_badvltpragma_bad.v

@@ -0,0 +1,9 @@
+// DESCRIPTION: Verilator: Verilog Test module
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+   // verilator lintt_off WIDTH  //<--- Warning (lint_off misspelled)
+   bit one = 2;
+endmodule