luke/verilator
1
0
Fork 0
mirror of https://github.com/verilator/verilator.git synced 2026-09-03 06:03:03 +02:00
Code Issues Packages Projects Releases Wiki Activity

Fix disable iff ignored when its condition is held continuously true (#7841)

Browse Source
This commit is contained in:
Yilou Wang
2026-06-26 06:00:44 -04:00
committed by GitHub
parent 2d157b29b0
commit 3853301367
6 changed files with 109 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/V3AssertNfa.cpp
+11 -1
View File
@@ -1983,8 +1983,18 @@ class SvaNfaLowering final {
AstNodeExpr*& sigp = c.vtx[i]->datap()->stateSigp;
if (sigp) VL_DO_DANGLING(sigp->deleteTree(), sigp);
}
// Disable iff gating on throughout/required-step rejects (IEEE 16.12).
// Disable iff gating (IEEE 1800-2023 16.12). The edge counter misses a
// continuously-true disable, so gate on the current level value too.
if (c.disableExprp) {
// terminalActivep is always set, so gate it unconditionally.
AstNodeExpr* const notTermp
= new AstLogNot{c.flp, c.disableExprp->cloneTreePure(false)};
sigs.terminalActivep = new AstLogAnd{c.flp, sigs.terminalActivep, notTermp};
if (sigs.rejectBasep) {
AstNodeExpr* const notDisp
= new AstLogNot{c.flp, c.disableExprp->cloneTreePure(false)};
sigs.rejectBasep = new AstLogAnd{c.flp, sigs.rejectBasep, notDisp};
}
if (sigs.throughoutRejectp) {
AstNodeExpr* const notDisp
= new AstLogNot{c.flp, c.disableExprp->cloneTreePure(false)};