mirror of
https://github.com/verilator/verilator.git
synced 2026-09-06 08:57:23 +02:00
Internals: Add more const. No functional change intended.
This commit is contained in:
+49
-43
@@ -70,23 +70,24 @@ private:
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// Use user1p on the PIN to indicate we created an assign for this pin
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if (!nodep->user1SetOnce()) {
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// Make an ASSIGNW (expr, pin)
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AstNode* exprp = nodep->exprp()->cloneTree(false);
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AstNode* const exprp = nodep->exprp()->cloneTree(false);
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UASSERT_OBJ(exprp->width() == nodep->modVarp()->width(), nodep,
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"Width mismatch, should have been handled in pinReconnectSimple");
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if (nodep->modVarp()->isInoutish()) {
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nodep->v3fatalSrc("Unsupported: Verilator is a 2-state simulator");
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} else if (nodep->modVarp()->isWritable()) {
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AstNode* rhsp = new AstVarXRef(exprp->fileline(), nodep->modVarp(),
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m_cellp->name(), VAccess::READ);
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AstAssignW* assp = new AstAssignW(exprp->fileline(), exprp, rhsp);
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AstNode* const rhsp = new AstVarXRef(exprp->fileline(), nodep->modVarp(),
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m_cellp->name(), VAccess::READ);
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AstAssignW* const assp = new AstAssignW(exprp->fileline(), exprp, rhsp);
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m_cellp->addNextHere(assp);
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} else if (nodep->modVarp()->isNonOutput()) {
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// Don't bother moving constants now,
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// we'll be pushing the const down to the cell soon enough.
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AstNode* assp = new AstAssignW(exprp->fileline(),
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new AstVarXRef(exprp->fileline(), nodep->modVarp(),
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m_cellp->name(), VAccess::WRITE),
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exprp);
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AstNode* const assp
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= new AstAssignW(exprp->fileline(),
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new AstVarXRef(exprp->fileline(), nodep->modVarp(),
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m_cellp->name(), VAccess::WRITE),
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exprp);
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m_cellp->addNextHere(assp);
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if (debug() >= 9) assp->dumpTree(cout, " _new: ");
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} else if (nodep->modVarp()->isIfaceRef()
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@@ -96,13 +97,14 @@ private:
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IfaceRefDType))) {
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// Create an AstAssignVarScope for Vars to Cells so we can
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// link with their scope later
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AstNode* lhsp = new AstVarXRef(exprp->fileline(), nodep->modVarp(),
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m_cellp->name(), VAccess::READ);
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const AstVarRef* refp = VN_CAST(exprp, VarRef);
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const AstVarXRef* xrefp = VN_CAST(exprp, VarXRef);
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AstNode* const lhsp = new AstVarXRef(exprp->fileline(), nodep->modVarp(),
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m_cellp->name(), VAccess::READ);
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const AstVarRef* const refp = VN_CAST(exprp, VarRef);
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const AstVarXRef* const xrefp = VN_CAST(exprp, VarXRef);
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UASSERT_OBJ(refp || xrefp, exprp,
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"Interfaces: Pin is not connected to a VarRef or VarXRef");
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AstAssignVarScope* assp = new AstAssignVarScope(exprp->fileline(), lhsp, exprp);
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AstAssignVarScope* const assp
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= new AstAssignVarScope(exprp->fileline(), lhsp, exprp);
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m_cellp->addNextHere(assp);
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} else {
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nodep->v3error("Assigned pin is neither input nor output");
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@@ -204,18 +206,18 @@ private:
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if (VN_IS(nodep->dtypep(), UnpackArrayDType)
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&& VN_IS(VN_AS(nodep->dtypep(), UnpackArrayDType)->subDTypep(), IfaceRefDType)) {
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UINFO(8, " dv-vec-VAR " << nodep << endl);
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AstUnpackArrayDType* arrdtype = VN_AS(nodep->dtypep(), UnpackArrayDType);
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AstUnpackArrayDType* const arrdtype = VN_AS(nodep->dtypep(), UnpackArrayDType);
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AstNode* prevp = nullptr;
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for (int i = arrdtype->lo(); i <= arrdtype->hi(); ++i) {
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const string varNewName = nodep->name() + "__BRA__" + cvtToStr(i) + "__KET__";
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UINFO(8, "VAR name insert " << varNewName << " " << nodep << endl);
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if (!m_deModVars.find(varNewName)) {
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AstIfaceRefDType* ifaceRefp
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AstIfaceRefDType* const ifaceRefp
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= VN_AS(arrdtype->subDTypep(), IfaceRefDType)->cloneTree(false);
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arrdtype->addNextHere(ifaceRefp);
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ifaceRefp->cellp(nullptr);
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AstVar* varNewp = nodep->cloneTree(false);
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AstVar* const varNewp = nodep->cloneTree(false);
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varNewp->name(varNewName);
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varNewp->origName(varNewp->origName() + "__BRA__" + cvtToStr(i) + "__KET__");
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varNewp->dtypep(ifaceRefp);
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@@ -245,7 +247,7 @@ private:
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if (nodep->rangep()) {
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m_cellRangep = nodep->rangep();
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AstVar* ifaceVarp = VN_CAST(nodep->nextp(), Var);
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AstVar* const ifaceVarp = VN_CAST(nodep->nextp(), Var);
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const bool isIface
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= ifaceVarp && VN_IS(ifaceVarp->dtypep(), UnpackArrayDType)
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&& VN_IS(VN_AS(ifaceVarp->dtypep(), UnpackArrayDType)->subDTypep(),
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@@ -257,7 +259,7 @@ private:
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= m_cellRangep->littleEndian() ? (m_cellRangep->elementsConst() - 1 - i) : i;
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const int instNum = m_cellRangep->loConst() + i;
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AstCell* newp = nodep->cloneTree(false);
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AstCell* const newp = nodep->cloneTree(false);
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nodep->addNextHere(newp);
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// Remove ranging and fix name
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newp->rangep()->unlinkFrBack()->deleteTree();
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@@ -271,11 +273,13 @@ private:
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// If this AstCell is actually an interface instantiation, also clone the IfaceRef
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// within the same parent module as the cell
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if (isIface) {
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AstUnpackArrayDType* arrdtype = VN_AS(ifaceVarp->dtypep(), UnpackArrayDType);
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AstIfaceRefDType* origIfaceRefp = VN_AS(arrdtype->subDTypep(), IfaceRefDType);
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AstUnpackArrayDType* const arrdtype
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= VN_AS(ifaceVarp->dtypep(), UnpackArrayDType);
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AstIfaceRefDType* const origIfaceRefp
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= VN_AS(arrdtype->subDTypep(), IfaceRefDType);
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origIfaceRefp->cellp(nullptr);
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AstVar* varNewp = ifaceVarp->cloneTree(false);
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AstIfaceRefDType* ifaceRefp = origIfaceRefp->cloneTree(false);
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AstVar* const varNewp = ifaceVarp->cloneTree(false);
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AstIfaceRefDType* const ifaceRefp = origIfaceRefp->cloneTree(false);
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arrdtype->addNextHere(ifaceRefp);
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ifaceRefp->cellp(newp);
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ifaceRefp->cellName(newp->name());
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@@ -327,7 +331,8 @@ private:
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<< pinDim.second << endl);
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if (expDim.first == pinDim.first && expDim.second == pinDim.second + 1) {
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// Connection to array, where array dimensions match the instant dimension
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AstRange* rangep = VN_AS(nodep->exprp()->dtypep(), UnpackArrayDType)->rangep();
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AstRange* const rangep
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= VN_AS(nodep->exprp()->dtypep(), UnpackArrayDType)->rangep();
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const int arraySelNum = rangep->littleEndian()
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? (rangep->elementsConst() - 1 - m_instSelNum)
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: m_instSelNum;
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@@ -362,11 +367,12 @@ private:
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}
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} // end expanding ranged cell
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else if (AstArraySel* arrselp = VN_CAST(nodep->exprp(), ArraySel)) {
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if (AstUnpackArrayDType* arrp = VN_CAST(arrselp->lhsp()->dtypep(), UnpackArrayDType)) {
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if (AstUnpackArrayDType* const arrp
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= VN_CAST(arrselp->lhsp()->dtypep(), UnpackArrayDType)) {
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if (!VN_IS(arrp->subDTypep(), IfaceRefDType)) return;
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// Interface pin attaches to one element of arrayed interface
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V3Const::constifyParamsEdit(arrselp->rhsp());
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const AstConst* constp = VN_CAST(arrselp->rhsp(), Const);
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const AstConst* const constp = VN_CAST(arrselp->rhsp(), Const);
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if (!constp) {
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nodep->v3warn(
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E_UNSUPPORTED,
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@@ -376,19 +382,19 @@ private:
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const string index = AstNode::encodeNumber(constp->toSInt());
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if (VN_IS(arrselp->lhsp(), SliceSel))
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arrselp->lhsp()->v3error("Unsupported: interface slices");
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AstVarRef* varrefp = VN_CAST(arrselp->lhsp(), VarRef);
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AstVarRef* const varrefp = VN_CAST(arrselp->lhsp(), VarRef);
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UASSERT_OBJ(varrefp, arrselp, "No interface varref under array");
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AstVarXRef* newp = new AstVarXRef(nodep->fileline(),
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varrefp->name() + "__BRA__" + index + "__KET__",
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"", VAccess::WRITE);
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AstVarXRef* const newp = new AstVarXRef(
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nodep->fileline(), varrefp->name() + "__BRA__" + index + "__KET__", "",
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VAccess::WRITE);
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newp->dtypep(nodep->modVarp()->dtypep());
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newp->classOrPackagep(varrefp->classOrPackagep());
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arrselp->addNextHere(newp);
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VL_DO_DANGLING(arrselp->unlinkFrBack()->deleteTree(), arrselp);
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}
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} else {
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AstVar* pinVarp = nodep->modVarp();
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AstUnpackArrayDType* pinArrp = VN_CAST(pinVarp->dtypep(), UnpackArrayDType);
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AstVar* const pinVarp = nodep->modVarp();
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AstUnpackArrayDType* const pinArrp = VN_CAST(pinVarp->dtypep(), UnpackArrayDType);
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if (!pinArrp || !VN_IS(pinArrp->subDTypep(), IfaceRefDType)) return;
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// Arrayed pin/var attaches to arrayed submodule lower port/var, expand it
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AstNode* prevp = nullptr;
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@@ -404,7 +410,7 @@ private:
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if (!pinVarp->backp()) {
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varNewp = m_deModVars.find(varNewName);
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} else {
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AstIfaceRefDType* ifaceRefp = VN_AS(pinArrp->subDTypep(), IfaceRefDType);
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AstIfaceRefDType* const ifaceRefp = VN_AS(pinArrp->subDTypep(), IfaceRefDType);
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ifaceRefp->cellp(nullptr);
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varNewp = pinVarp->cloneTree(false);
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varNewp->name(varNewName);
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@@ -425,18 +431,18 @@ private:
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// But clone the pin for each module instance
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// Now also clone the pin itself and update its varref
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AstPin* newp = nodep->cloneTree(false);
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AstPin* const newp = nodep->cloneTree(false);
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newp->modVarp(varNewp);
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newp->name(newp->name() + "__BRA__" + cvtToStr(i) + "__KET__");
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// And replace exprp with a new varxref
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const AstVarRef* varrefp = VN_CAST(newp->exprp(), VarRef); // Maybe null
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int expr_i = i;
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if (AstSliceSel* slicep = VN_CAST(newp->exprp(), SliceSel)) {
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if (AstSliceSel* const slicep = VN_CAST(newp->exprp(), SliceSel)) {
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varrefp = VN_AS(slicep->fromp(), VarRef);
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UASSERT(VN_IS(slicep->rhsp(), Const), "Slices should be constant");
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int slice_index
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= slicep->declRange().left() + in * slicep->declRange().leftToRightInc();
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auto* exprArrp = VN_AS(varrefp->dtypep(), UnpackArrayDType);
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auto* const exprArrp = VN_AS(varrefp->dtypep(), UnpackArrayDType);
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UASSERT_OBJ(exprArrp, slicep, "Slice of non-array");
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expr_i = slice_index + exprArrp->lo();
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} else if (!varrefp) {
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@@ -446,7 +452,7 @@ private:
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}
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const string newname = varrefp->name() + "__BRA__" + cvtToStr(expr_i) + "__KET__";
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AstVarXRef* newVarXRefp
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AstVarXRef* const newVarXRefp
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= new AstVarXRef(nodep->fileline(), newname, "", VAccess::WRITE);
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newVarXRefp->varp(newp->modVarp());
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newp->exprp()->unlinkFrBack()->deleteTree();
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@@ -506,7 +512,7 @@ public:
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// Else create a intermediate wire to perform the interconnect
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// Return the new assignment, if one was made
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// Note this module calles cloneTree() via new AstVar
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AstVar* pinVarp = pinp->modVarp();
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AstVar* const pinVarp = pinp->modVarp();
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if (!pinp->exprp()) {
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// No-connect, perhaps promote based on `unconnected_drive,
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// otherwise done
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@@ -520,9 +526,9 @@ public:
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return nullptr;
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}
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}
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AstVarRef* connectRefp = VN_CAST(pinp->exprp(), VarRef);
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AstVarXRef* connectXRefp = VN_CAST(pinp->exprp(), VarXRef);
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AstBasicDType* pinBasicp = VN_CAST(pinVarp->dtypep(), BasicDType); // Maybe nullptr
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AstVarRef* const connectRefp = VN_CAST(pinp->exprp(), VarRef);
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AstVarXRef* const connectXRefp = VN_CAST(pinp->exprp(), VarXRef);
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AstBasicDType* const pinBasicp = VN_CAST(pinVarp->dtypep(), BasicDType); // Maybe nullptr
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AstBasicDType* connBasicp = nullptr;
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AstAssignW* assignp = nullptr;
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if (connectRefp) connBasicp = VN_CAST(connectRefp->varp()->dtypep(), BasicDType);
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@@ -547,12 +553,12 @@ public:
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// Make a new temp wire
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// if (1 || debug() >= 9) pinp->dumpTree(cout, "-in_pin:");
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V3Inst::checkOutputShort(pinp);
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AstNode* pinexprp = pinp->exprp()->unlinkFrBack();
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AstNode* const pinexprp = pinp->exprp()->unlinkFrBack();
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string newvarname
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= (string(pinVarp->isWritable() ? "__Vcellout" : "__Vcellinp")
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// Prevent name conflict if both tri & non-tri add signals
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+ (forTristate ? "t" : "") + "__" + cellp->name() + "__" + pinp->name());
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AstVar* newvarp
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AstVar* const newvarp
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= new AstVar(pinVarp->fileline(), AstVarType::MODULETEMP, newvarname, pinVarp);
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// Important to add statement next to cell, in case there is a
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// generate with same named cell
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@@ -567,7 +573,7 @@ public:
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<< pinexprp->width() << endl);
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rhsp = extendOrSel(pinp->fileline(), rhsp, pinVarp);
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pinp->exprp(new AstVarRef(newvarp->fileline(), newvarp, VAccess::WRITE));
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AstNode* rhsSelp = extendOrSel(pinp->fileline(), rhsp, pinexprp);
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AstNode* const rhsSelp = extendOrSel(pinp->fileline(), rhsp, pinexprp);
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assignp = new AstAssignW(pinp->fileline(), pinexprp, rhsSelp);
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} else {
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// V3 width should have range/extended to make the widths correct
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