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https://github.com/verilator/verilator.git
synced 2026-10-06 01:54:01 +02:00
Internals: Merge from struct branch, rename SymTable calls. No functional change intended.
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+9
-9
@@ -195,9 +195,9 @@ private:
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// Cell: Resolve its filename. If necessary, parse it.
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if (!nodep->modp()) {
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UINFO(4,"Link Cell: "<<nodep<<endl);
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// Use findIdUpward instead of findIdFlat; it doesn't matter for now
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// Use findIdFallback instead of findIdFlat; it doesn't matter for now
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// but we might support modules-under-modules someday.
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AstNodeModule* modp = m_mods.findIdUpward(nodep->modName())->castNodeModule();
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AstNodeModule* modp = m_mods.findIdFallback(nodep->modName())->castNodeModule();
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if (!modp) {
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// Read-subfile
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// If file not found, make AstNotFoundModule, rather than error out.
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@@ -208,7 +208,7 @@ private:
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// We've read new modules, grab new pointers to their names
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readModNames();
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// Check again
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modp = m_mods.findIdUpward(nodep->modName())->castNodeModule();
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modp = m_mods.findIdFallback(nodep->modName())->castNodeModule();
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if (!modp) {
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nodep->v3error("Can't resolve module reference: "<<nodep->modName());
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}
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@@ -251,20 +251,20 @@ private:
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}
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if (nodep->modp()) {
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// Note what pins exist
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V3SymTable ports; // Symbol table of all connected port names
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set<string> ports; // Symbol table of all connected port names
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for (AstPin* pinp = nodep->pinsp(); pinp; pinp=pinp->nextp()->castPin()) {
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if (pinp->name()=="") pinp->v3error("Connect by position is illegal in .* connected cells");
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if (!pinp->exprp()) pinp->v3warn(PINNOCONNECT,"Cell pin is not connected: "<<pinp->prettyName());
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if (!ports.findIdFlat(pinp->name())) {
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ports.insert(pinp->name(), pinp);
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if (ports.find(pinp->name()) == ports.end()) {
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ports.insert(pinp->name());
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}
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}
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// We search ports, rather than in/out declarations as they aren't resolved yet,
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// and it's easier to do it now than in V3Link when we'd need to repeat steps.
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for (AstNode* portnodep = nodep->modp()->stmtsp(); portnodep; portnodep=portnodep->nextp()) {
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if (AstPort* portp = portnodep->castPort()) {
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if (!ports.findIdFlat(portp->name())
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&& !ports.findIdFlat("__pinNumber"+cvtToStr(portp->pinNum()))) {
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if (ports.find(portp->name()) == ports.end()
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&& ports.find("__pinNumber"+cvtToStr(portp->pinNum())) == ports.end()) {
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if (pinStar) {
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UINFO(9," need .* PORT "<<portp<<endl);
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// Create any not already connected
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@@ -299,7 +299,7 @@ private:
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// Look at all modules, and store pointers to all module names
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for (AstNodeModule* nextp,* nodep = v3Global.rootp()->modulesp(); nodep; nodep=nextp) {
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nextp = nodep->nextp()->castNodeModule();
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AstNode* foundp = m_mods.findIdUpward(nodep->name());
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AstNode* foundp = m_mods.findIdFallback(nodep->name());
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if (foundp && foundp != nodep) {
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if (!(foundp->fileline()->warnIsOff(V3ErrorCode::MODDUP) || nodep->fileline()->warnIsOff(V3ErrorCode::MODDUP))) {
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nodep->v3warn(MODDUP,"Duplicate declaration of module: "<<nodep->prettyName()<<endl
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