Add t_trace_c_api test.
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2885c2ce97
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@ -358,8 +358,8 @@ void VerilatedVcd::bufferFlush() VL_MT_UNSAFE_ONE {
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if (got > 0) {
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wp += got;
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m_wroteBytes += got;
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} else if (got < 0) {
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if (errno != EAGAIN && errno != EINTR) {
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} else if (VL_UNCOVERABLE(got < 0)) {
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if (VL_UNCOVERABLE(errno != EAGAIN && errno != EINTR)) {
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// write failed, presume error (perhaps out of disk space)
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std::string msg = std::string("VerilatedVcd::bufferFlush: ") + strerror(errno);
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VL_FATAL_MT("", 0, "", msg.c_str());
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@ -873,8 +873,6 @@ void VerilatedVcd::flush_all() VL_MT_UNSAFE_ONE { VerilatedVcdSingleton::flush_a
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//======================================================================
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//======================================================================
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// clang-format off
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#ifdef VERILATED_VCD_TEST
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#include <iostream>
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@ -884,32 +882,34 @@ vluint32_t tri96__tri[3];
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vluint64_t quad96[2];
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vluint8_t ch;
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vluint64_t timestamp = 1;
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double doub = 0;
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double doub = 0.0;
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float flo = 0.0f;
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void vcdInit(VerilatedVcd* vcdp, void* userthis, vluint32_t code) {
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void vcdInit(void*, VerilatedVcd* vcdp, vluint32_t) {
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vcdp->scopeEscape('.');
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vcdp->module("top");
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vcdp->declBus(0x2, "v1",-1,5,1);
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vcdp->declBus(0x3, "v2",-1,6,0);
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vcdp->module("top.sub1");
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vcdp->declBit(0x4, "s1",-1);
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vcdp->declBit(0x5, "ch",-1);
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vcdp->module("top.sub2");
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vcdp->declArray(0x6, "s2",-1, 40,3);
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/**/ vcdp->declBus(0x2, "v1", -1, 0, 5, 1);
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/**/ vcdp->declBus(0x3, "v2", -1, 0, 6, 1);
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/**/ vcdp->module("top.sub1");
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/***/ vcdp->declBit(0x4, "s1", -1, 0);
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/***/ vcdp->declBit(0x5, "ch", -1, 0);
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/**/ vcdp->module("top.sub2");
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/***/ vcdp->declArray(0x6, "s2", -1, 0, 40, 3);
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// Note need to add 3 for next code.
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vcdp->module("top2");
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vcdp->declBus(0x2, "t2v1",-1,4,1);
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vcdp->declTriBit(0x10, "io1",-1);
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vcdp->declTriBus(0x12, "io5",-1,4,0);
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vcdp->declTriArray(0x16, "io96",-1,95,0);
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// Note need to add 6 for next code.
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vcdp->declDouble(0x1c, "doub",-1);
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// Note need to add 2 for next code.
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vcdp->declArray(0x1e, "q2",-1,95,0);
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/**/ vcdp->declBus(0x2, "t2v1", -1, 0, 4, 1);
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/**/ vcdp->declTriBit(0x10, "io1", -1, 0);
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/**/ vcdp->declTriBus(0x12, "io5", -1, 0, 4, 0);
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/**/ vcdp->declTriArray(0x16, "io96", -1, 0, 95, 0);
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/**/ // Note need to add 6 for next code.
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/**/ vcdp->declDouble(0x1c, "doub", -1, 0);
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/**/ // Note need to add 2 for next code.
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/**/ vcdp->declDouble(0x1e, "flo", -1, 0);
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/**/ vcdp->declArray(0x20, "q2", -1, 0, 95, 0);
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// Note need to add 4 for next code.
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}
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void vcdFull(VerilatedVcd* vcdp, void* userthis, vluint32_t code) {
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void vcdFull(void*, VerilatedVcd* vcdp) {
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vcdp->fullBus(0x2, v1, 5);
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vcdp->fullBus(0x3, v2, 7);
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vcdp->fullBit(0x4, s1);
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@ -919,10 +919,11 @@ void vcdFull(VerilatedVcd* vcdp, void* userthis, vluint32_t code) {
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vcdp->fullTriBus(0x12, tri96[0] & 0x1f, tri96__tri[0] & 0x1f, 5);
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vcdp->fullTriArray(0x16, tri96, tri96__tri, 96);
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vcdp->fullDouble(0x1c, doub);
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vcdp->fullArray(0x1e, &quad96[0], 96);
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vcdp->fullFloat(0x1e, flo);
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vcdp->fullArray(0x20, &quad96[0], 96);
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}
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void vcdChange(VerilatedVcd* vcdp, void* userthis, vluint32_t code) {
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void vcdChange(void*, VerilatedVcd* vcdp) {
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vcdp->chgBus(0x2, v1, 5);
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vcdp->chgBus(0x3, v2, 7);
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vcdp->chgBit(0x4, s1);
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@ -932,12 +933,12 @@ void vcdChange(VerilatedVcd* vcdp, void* userthis, vluint32_t code) {
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vcdp->chgTriBus(0x12, tri96[0] & 0x1f, tri96__tri[0] & 0x1f, 5);
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vcdp->chgTriArray(0x16, tri96, tri96__tri, 96);
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vcdp->chgDouble(0x1c, doub);
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vcdp->chgArray(0x1e, &quad96[0], 96);
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vcdp->chgFloat(0x1e, flo);
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vcdp->chgArray(0x20, &quad96[0], 96);
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}
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main() {
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std::cout << "test: O_LARGEFILE=" << O_LARGEFILE << std::endl;
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// clang-format off
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void vcdTestMain(const char* filenamep) {
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v1 = v2 = s1 = 0;
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s2[0] = s2[1] = s2[2] = 0;
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tri96[2] = tri96[1] = tri96[0] = 0;
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@ -947,41 +948,46 @@ main() {
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doub = 0;
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{
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VerilatedVcdC* vcdp = new VerilatedVcdC;
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vcdp->spTrace()->addCallback(&vcdInit, &vcdFull, &vcdChange, 0);
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vcdp->open("test.vcd");
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vcdp->spTrace()->addInitCb(&vcdInit, 0);
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vcdp->spTrace()->addFullCb(&vcdFull, 0);
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vcdp->spTrace()->addChgCb(&vcdChange, 0);
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vcdp->open(filenamep);
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// Dumping
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vcdp->dump(timestamp++);
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vcdp->dump(++timestamp);
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v1 = 0xfff;
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tri96[2] = 4; tri96[1] = 2; tri96[0] = 1;
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tri96__tri[2] = tri96__tri[1] = tri96__tri[0] = ~0; // Still tri
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quad96[1] = 0xffffffff; quad96[0] = 0;
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doub = 1.5;
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vcdp->dump(timestamp++);
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flo = 1.4f;
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vcdp->dump(++timestamp);
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v2 = 0x1;
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s2[1] = 2;
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tri96__tri[2] = tri96__tri[1] = tri96__tri[0] = 0; // enable w/o data change
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quad96[1] = 0; quad96[0] = ~0;
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doub = -1.66e13;
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vcdp->dump(timestamp++);
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flo = 0.123f;
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vcdp->dump(++timestamp);
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ch = 2;
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tri96[2] = ~4; tri96[1] = ~2; tri96[0] = ~1;
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doub = -3.33e-13;
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vcdp->dump(timestamp++);
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vcdp->dump(timestamp++);
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vcdp->dump(++timestamp);
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vcdp->dump(++timestamp);
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# ifdef VERILATED_VCD_TEST_64BIT
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vluint64_t bytesPerDump = VL_ULL(15);
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for (vluint64_t i = 0; i < ((VL_ULL(1) << 32) / bytesPerDump); i++) {
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v1 = i;
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vcdp->dump(timestamp++);
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vcdp->dump(++timestamp);
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}
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# endif
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vcdp->close();
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}
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}
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#endif
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// clang-format on
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//********************************************************************
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// ;compile-command: "mkdir -p ../test_dir && cd ../test_dir && c++ -DVERILATED_VCD_TEST ../include/verilated_vcd_c.cpp -o verilated_vcd_c && ./verilated_vcd_c && cat test.vcd"
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// ;compile-command: "v4make test_regress/t/t_trace_c_api.pl"
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//
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// Local Variables:
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// End:
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@ -442,7 +442,8 @@ void EmitCSyms::emitSymHdr() {
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}
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if (v3Global.opt.trace()) {
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puts("bool __Vm_activity; ///< Used by trace routines to determine change occurred\n");
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puts("uint32_t __Vm_baseCode; ///< Used by trace routines when tracing multiple models\n");
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puts("uint32_t __Vm_baseCode; "
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"///< Used by trace routines when tracing multiple models\n");
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}
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puts("bool __Vm_didInit;\n");
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@ -0,0 +1,22 @@
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// -*- mode: C++; c-file-style: "cc-mode" -*-
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//
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2008 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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#include <verilated.h>
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#include <verilated_vcd_c.h>
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#include VM_PREFIX_INCLUDE
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extern void vcdTestMain(const char* filenamep);
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int main(int argc, char** argv, char** env) {
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const char* filenamep = VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd";
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printf("Writing %s\n", filenamep);
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vcdTestMain(filenamep);
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printf("*-* All Finished *-*\n");
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return 0;
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}
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@ -0,0 +1,30 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2003-2013 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(vlt_all => 1);
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compile(
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make_top_shell => 0,
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make_main => 0,
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v_flags2 => ["--trace --exe $Self->{t_dir}/t_trace_c_api.cpp",
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"-CFLAGS -DVERILATED_VCD_TEST",
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"-CFLAGS -DVL_TRACE_VCD_OLD_API"],
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);
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execute(
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check_finished => 1,
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);
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# vcddiff bug crashes
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#vcd_identical("$Self->{obj_dir}/simx.vcd",
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# $Self->{golden_filename});
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ok(1);
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1;
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@ -0,0 +1,8 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2013 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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module t;
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endmodule
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