restore the assert type warning

This commit is contained in:
Yilou Wang 2026-06-16 14:46:57 +02:00
parent e91d8d4f8d
commit 350e718f3a
4 changed files with 66 additions and 0 deletions

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@ -1005,6 +1005,22 @@ class AssertVisitor final : public VNVisitor {
}
}
// When assertion_type is a compile-time constant, reject values that cannot be
// filtered at runtime because unique/priority violations use bare assertOn() rather
// than a per-type assertOnGet() call (IEEE 1800-2023 Table 20-6).
if (nodep->assertTypesp()) {
if (const AstConst* const typecp = VN_CAST(nodep->assertTypesp(), Const)) {
if (typecp->toUInt()
& (VAssertType::EXPECT | VAssertType::UNIQUE | VAssertType::UNIQUE0
| VAssertType::PRIORITY)) {
nodep->unlinkFrBack();
nodep->v3warn(E_UNSUPPORTED, "Unsupported: assert control assertion_type");
VL_DO_DANGLING(pushDeletep(nodep), nodep);
return;
}
}
}
UINFO(9, "Generating assertctl in module: " << m_modp);
AstCStmt* const callp = new AstCStmt{fl, "vlSymsp->_vm_contextp__->assertCtl("};
callp->add(nodep->controlTypep()->unlinkFrBack());

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@ -0,0 +1,14 @@
%Error-UNSUPPORTED: t/t_assert_ctl_arg_unsup.v:15:5: Unsupported: assert control assertion_type
15 | $assertcontrol(OFF, EXPECT);
| ^~~~~~~~~~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_assert_ctl_arg_unsup.v:16:5: Unsupported: assert control assertion_type
16 | $assertcontrol(OFF, UNIQUE);
| ^~~~~~~~~~~~~~
%Error-UNSUPPORTED: t/t_assert_ctl_arg_unsup.v:17:5: Unsupported: assert control assertion_type
17 | $assertcontrol(OFF, UNIQUE0);
| ^~~~~~~~~~~~~~
%Error-UNSUPPORTED: t/t_assert_ctl_arg_unsup.v:18:5: Unsupported: assert control assertion_type
18 | $assertcontrol(OFF, PRIORITY);
| ^~~~~~~~~~~~~~
%Error: Exiting due to

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@ -0,0 +1,16 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of either the GNU Lesser General Public License Version 3
# or the Perl Artistic License Version 2.0.
# SPDX-FileCopyrightText: 2024 Wilson Snyder
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('vlt')
test.lint(fails=True, expect_filename=test.golden_filename)
test.passes()

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@ -0,0 +1,20 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain
// SPDX-FileCopyrightText: 2024 Antmicro
// SPDX-License-Identifier: CC0-1.0
module t;
let OFF = 4;
let EXPECT = 16;
let UNIQUE = 32;
let UNIQUE0 = 64;
let PRIORITY = 128;
initial begin
$assertcontrol(OFF, EXPECT);
$assertcontrol(OFF, UNIQUE);
$assertcontrol(OFF, UNIQUE0);
$assertcontrol(OFF, PRIORITY);
end
endmodule