luke
/
verilator
mirror of https://github.com/verilator/verilator.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Ignore unsupported statements in the specify block 

Signed-off-by: Krzysztof Sychla <ksychla@antmicro.com>
This commit is contained in:
Krzysztof Sychla 2025-03-03 11:36:25 +01:00
parent 9a64049c7e
commit 31e5c526cf
1 changed files with 3 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
src/verilog.y
View File

@ -5775,9 +5775,8 @@ specify_itemList<nodep>: // IEEE: { specify_item }
;
specify_item<nodep>: // ==IEEE: specify_item
specparam_declaration { $$ = $1; }
| system_timing_check { $$ = $1; }
| yaTIMINGSPEC junkToSemiList ';' { $$ = nullptr; }
system_timing_check { $$ = $1; }
| junkToSemiList ';' { $$ = nullptr; }
;
specparam_declaration<nodep>: // ==IEEE: specparam_declaration
@ -5828,7 +5827,7 @@ junkToSemiList:
;
junkToSemi:
BISONPRE_NOT(';',yENDSPECIFY,yENDMODULE) { }
BISONPRE_NOT(';',yENDSPECIFY,yENDMODULE,yD_SETUPHOLD) { }
| error {}
;