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https://github.com/verilator/verilator.git
synced 2026-10-06 01:54:01 +02:00
Merge from master
This commit is contained in:
+24
-10
@@ -262,7 +262,8 @@ public:
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AstCell* nodep, const string& scopename) {
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if (!abovep) nodep->v3fatalSrc("Null symbol table inserting node");
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VSymEnt* symp = new VSymEnt(&m_syms, nodep);
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UINFO(9," INSERTcel se"<<(void*)symp<<" "<<scopename<<" above=se"<<(void*)abovep<<" mods=se"<<(void*)modSymp<<" node="<<nodep<<endl);
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UINFO(9," INSERTcel se"<<(void*)symp<<" "<<scopename<<" above=se"<<(void*)abovep
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<<" mods=se"<<(void*)modSymp<<" node="<<nodep<<endl);
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symp->parentp(abovep);
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symp->fallbackp(dunitEntp()); // Needed so can find $unit stuff
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nodep->user1p(symp);
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@@ -283,7 +284,8 @@ public:
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// This refrences to another Sym, and eventually resolves to a module with a prefix
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if (!abovep) nodep->v3fatalSrc("Null symbol table inserting node");
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VSymEnt* symp = new VSymEnt(&m_syms, nodep);
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UINFO(9," INSERTinl se"<<(void*)symp<<" "<<basename<<" above=se"<<(void*)abovep<<" mods=se"<<(void*)modSymp<<" node="<<nodep<<endl);
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UINFO(9," INSERTinl se"<<(void*)symp<<" "<<basename<<" above=se"<<(void*)abovep
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<<" mods=se"<<(void*)modSymp<<" node="<<nodep<<endl);
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symp->parentp(abovep);
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symp->fallbackp(modSymp);
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symp->symPrefix(nodep->name()+"__DOT__");
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@@ -1551,7 +1553,8 @@ private:
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inline void checkNoDot(AstNode* nodep) {
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if (VL_UNLIKELY(m_ds.m_dotPos != DP_NONE)) {
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//UINFO(9,"ds="<<m_ds.ascii()<<endl);
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nodep->v3error("Syntax Error: Not expecting "<<nodep->type()<<" under a "<<nodep->backp()->type()<<" in dotted expression");
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nodep->v3error("Syntax Error: Not expecting "<<nodep->type()<<" under a "
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<<nodep->backp()->type()<<" in dotted expression");
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m_ds.m_dotErr = true;
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}
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}
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@@ -1815,7 +1818,8 @@ private:
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AstCell* cellp = VN_CAST(foundp->nodep(), Cell);
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if (VN_IS(cellp->modp(), Iface)) {
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// Interfaces can be referenced like a variable for interconnect
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VSymEnt* cellEntp = m_statep->getNodeSym(cellp); if (!cellEntp) nodep->v3fatalSrc("No interface sym entry");
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VSymEnt* cellEntp = m_statep->getNodeSym(cellp);
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if (!cellEntp) nodep->v3fatalSrc("No interface sym entry");
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VSymEnt* parentEntp = cellEntp->parentp(); // Container of the var; probably a module or generate begin
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string findName = nodep->name()+"__Viftop";
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VSymEnt* ifaceSymp = parentEntp->findIdFallback(findName);
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@@ -2011,7 +2015,8 @@ private:
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VSymEnt* foundp = m_statep->findSymPrefixed(dotSymp, nodep->name(), baddot);
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AstVarScope* vscp = foundp ? VN_CAST(foundp->nodep(), VarScope) : NULL;
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if (!vscp) {
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nodep->v3error("Can't find varpin scope of '"<<baddot<<"' in dotted signal: "<<nodep->dotted()+"."+nodep->prettyName());
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nodep->v3error("Can't find varpin scope of '"<<baddot
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<<"' in dotted signal: "<<nodep->dotted()+"."+nodep->prettyName());
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okSymp->cellErrorScopes(nodep);
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} else {
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while (vscp->user2p()) { // If V3Inline aliased it, pick up the new signal
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@@ -2126,7 +2131,8 @@ private:
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} else if (nodep->dotted() == "") {
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nodep->v3error("Can't find definition of task/function: "<<nodep->prettyName());
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} else {
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nodep->v3error("Can't find definition of '"<<baddot<<"' in dotted task/function: "<<nodep->dotted()+"."+nodep->prettyName());
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nodep->v3error("Can't find definition of '"<<baddot
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<<"' in dotted task/function: "<<nodep->dotted()+"."+nodep->prettyName());
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okSymp->cellErrorScopes(nodep);
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}
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}
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@@ -2314,21 +2320,29 @@ public:
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int V3LinkDot::debug() { return LinkDotState::debug(); }
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void V3LinkDot::linkDotGuts(AstNetlist* rootp, VLinkDotStep step) {
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if (LinkDotState::debug()>=5 || v3Global.opt.dumpTree()>=9) v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot.tree"));
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if (LinkDotState::debug()>=5 || v3Global.opt.dumpTree()>=9) {
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v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot.tree"));
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}
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LinkDotState state (rootp, step);
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LinkDotFindVisitor visitor(rootp,&state);
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if (LinkDotState::debug()>=5 || v3Global.opt.dumpTree()>=9) v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot-find.tree"));
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if (LinkDotState::debug()>=5 || v3Global.opt.dumpTree()>=9) {
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v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot-find.tree"));
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}
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if (step == LDS_PRIMARY || step == LDS_PARAMED) {
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// Initial link stage, resolve parameters
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LinkDotParamVisitor visitors(rootp,&state);
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if (LinkDotState::debug()>=5 || v3Global.opt.dumpTree()>=9) v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot-param.tree"));
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if (LinkDotState::debug()>=5 || v3Global.opt.dumpTree()>=9) {
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v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot-param.tree"));
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}
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}
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else if (step == LDS_ARRAYED) {}
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else if (step == LDS_SCOPED) {
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// Well after the initial link when we're ready to operate on the flat design,
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// process AstScope's. This needs to be separate pass after whole hierarchy graph created.
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LinkDotScopeVisitor visitors(rootp,&state);
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if (LinkDotState::debug()>=5 || v3Global.opt.dumpTree()>=9) v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot-scoped.tree"));
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if (LinkDotState::debug()>=5 || v3Global.opt.dumpTree()>=9) {
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v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot-scoped.tree"));
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}
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}
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else v3fatalSrc("Bad case");
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state.dump();
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