Fix -G and -pvalue with --hierarchical.
Properly strip these from the hier_block builds, but not from the top level wrapper. Improve existing test to cover.
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af2771e901
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2a0b331ee3
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@ -580,18 +580,44 @@ string V3Options::filePathCheckOneDir(const string& modname, const string& dirna
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// 2: Delete the option and its argument
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// 3: Delete the option and its argument if it is a number
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int V3Options::stripOptionsForChildRun(const string& opt, bool forTop) {
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if (opt == "j") return 3;
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if (opt == "Mdir" || opt == "clk" || opt == "lib-create" || opt == "f" || opt == "F"
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|| opt == "v" || opt == "l2-name" || opt == "mod-prefix" || opt == "prefix"
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|| opt == "protect-lib" || opt == "protect-key" || opt == "threads"
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|| opt == "top-module") {
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return 2;
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}
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if (opt == "build"
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|| (!forTop && (opt == "cc" || opt == "exe" || opt == "sc" || opt == "binary"))
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|| opt == "hierarchical" || (opt.length() > 2 && opt.substr(0, 2) == "G=")) {
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return 1;
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// Options to strip for both the top wrapper, and hier blocks
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static const std::unordered_map<std::string, int> commonOpts{
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//
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{"j", 3},
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//
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{"Mdir", 2},
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{"clk", 2},
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{"lib-create", 2},
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{"f", 2},
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{"F", 2},
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{"v", 2},
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{"l2-name", 2},
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{"mod-prefix", 2},
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{"prefix", 2},
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{"protect-lib", 2},
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{"protect-key", 2},
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{"threads", 2},
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{"top-module", 2},
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//
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{"build", 1},
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{"hierarchical", 1},
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};
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if (commonOpts.count(opt)) return commonOpts.at(opt);
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// Options to strip only for hier blocks
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if (!forTop) {
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static const std::unordered_map<std::string, int> subOpts{
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{"cc", 1},
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{"exe", 1},
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{"sc", 1},
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{"binary", 1},
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};
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if (subOpts.count(opt)) return subOpts.at(opt);
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if (VString::startsWith(opt, "G")) return 1;
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if (VString::startsWith(opt, "pvalue")) return 1;
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}
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// Do not strip
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return 0;
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}
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@ -18,9 +18,16 @@ test.clean_objs()
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# %Warning-UNOPTTHREADS: Thread scheduler is unable to provide requested parallelism; consider asking for fewer threads.
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# So use 6 threads here though it's not optimal in performance, but ok.
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test.compile(v_flags2=['t/t_hier_block.cpp'],
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test.compile(
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v_flags2=['t/t_hier_block.cpp'],
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verilator_flags2=[
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'--stats', '--hierarchical', '--Wno-TIMESCALEMOD', '--CFLAGS',
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'--stats',
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'--hierarchical',
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'--Wno-TIMESCALEMOD', #
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'-GPARAM_A=100',
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'-pvalue+PARAM_B=200',
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'-DPARAM_OVERRIDE', #
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'--CFLAGS',
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'"-pipe -DCPP_MACRO=cplusplus"'
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],
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threads=(6 if test.vltmt else 1))
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@ -25,7 +25,10 @@ module secret (
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clk
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);
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`else
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module t (/*AUTOARG*/
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module t #(
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parameter int PARAM_A = 33,
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parameter int PARAM_B = 44
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) (/*AUTOARG*/
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// Inputs
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clk
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);
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@ -55,6 +58,15 @@ module t (/*AUTOARG*/
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always_ff @(posedge clk) begin
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if (out3 != out3_2) $stop;
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`ifndef AS_PROT_LIB
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`ifdef PARAM_OVERRIDE
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if (PARAM_A != 100) $stop;
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if (PARAM_B != 200) $stop;
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`else
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if (PARAM_A != 33) $stop;
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if (PARAM_B != 44) $stop;
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`endif
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`endif
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$display("%d %m out0:%d %d %d %d %d", count, out0, out1, out2, out3, out5, out6);
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$display("%d %m child input ports: %d %d %d", count, i_sub1.in, i_sub2.in, i_sub3.in);
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$display("%d %m child output ports: %d %d %d", count, i_sub1.out, i_sub2.out, i_sub3.out);
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@ -12,6 +12,70 @@
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)
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(INSTANCE t
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(NET
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(PARAM_A\[0\] (T0 0) (T1 170) (TZ 0) (TX 0) (TB 0) (TC 1))
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(PARAM_A\[1\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[2\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[3\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[4\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[5\] (T0 0) (T1 170) (TZ 0) (TX 0) (TB 0) (TC 1))
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(PARAM_A\[6\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[7\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[8\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[9\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[10\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[11\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[12\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[13\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[14\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[15\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[16\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[17\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[18\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[19\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[20\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[21\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[22\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[23\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[24\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[25\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[26\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[27\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[28\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[29\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[30\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_A\[31\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[0\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[1\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[2\] (T0 0) (T1 170) (TZ 0) (TX 0) (TB 0) (TC 1))
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(PARAM_B\[3\] (T0 0) (T1 170) (TZ 0) (TX 0) (TB 0) (TC 1))
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(PARAM_B\[4\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[5\] (T0 0) (T1 170) (TZ 0) (TX 0) (TB 0) (TC 1))
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(PARAM_B\[6\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[7\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[8\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[9\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[10\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[11\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[12\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[13\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[14\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[15\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[16\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[17\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[18\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[19\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[20\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[21\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[22\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[23\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[24\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[25\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[26\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[27\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[28\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[29\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[30\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(PARAM_B\[31\] (T0 170) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
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(clk (T0 90) (T1 80) (TZ 0) (TX 0) (TB 0) (TC 33))
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(out0\[0\] (T0 100) (T1 70) (TZ 0) (TX 0) (TB 0) (TC 7))
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(out0\[1\] (T0 80) (T1 90) (TZ 0) (TX 0) (TB 0) (TC 10))
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