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Update tests 

Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
This commit is contained in:
Ryszard Rozak 2025-05-21 08:33:24 +02:00
parent c6ddc7e081
commit 2971f41d17
8 changed files with 332 additions and 332 deletions
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304
test_regress/t/t_assert_ctl_arg.dat.out
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@ -1,153 +1,153 @@
# SystemC::Coverage-3
C 'ft/t_assert_ctl_arg.vl100n32pagev_user/tocover_simple_immediate_100htop.t.cover_simple_immediate_100' 1
C 'ft/t_assert_ctl_arg.vl100n37pagev_user/tocover_simple_immediate_stmt_100htop.t.cover_simple_immediate_stmt_100' 1
C 'ft/t_assert_ctl_arg.vl100n40pagev_user/tocover_final_deferred_immediate_100htop.t.cover_final_deferred_immediate_100' 1
C 'ft/t_assert_ctl_arg.vl100n43pagev_user/tocover_observed_deferred_immediate_100htop.t.cover_observed_deferred_immediate_100' 1
C 'ft/t_assert_ctl_arg.vl100n45pagev_user/tocover_final_deferred_immediate_stmt_100htop.t.cover_final_deferred_immediate_stmt_100' 1
C 'ft/t_assert_ctl_arg.vl100n48pagev_user/tocover_observed_deferred_immediate_stmt_100htop.t.cover_observed_deferred_immediate_stmt_100' 1
C 'ft/t_assert_ctl_arg.vl103n32pagev_user/tocover_simple_immediate_103htop.t.cover_simple_immediate_103' 0
C 'ft/t_assert_ctl_arg.vl103n37pagev_user/tocover_simple_immediate_stmt_103htop.t.cover_simple_immediate_stmt_103' 0
C 'ft/t_assert_ctl_arg.vl103n40pagev_user/tocover_final_deferred_immediate_103htop.t.cover_final_deferred_immediate_103' 0
C 'ft/t_assert_ctl_arg.vl103n43pagev_user/tocover_observed_deferred_immediate_103htop.t.cover_observed_deferred_immediate_103' 0
C 'ft/t_assert_ctl_arg.vl103n45pagev_user/tocover_final_deferred_immediate_stmt_103htop.t.cover_final_deferred_immediate_stmt_103' 0
C 'ft/t_assert_ctl_arg.vl103n48pagev_user/tocover_observed_deferred_immediate_stmt_103htop.t.cover_observed_deferred_immediate_stmt_103' 0
C 'ft/t_assert_ctl_arg.vl106n32pagev_user/tocover_simple_immediate_106htop.t.cover_simple_immediate_106' 1
C 'ft/t_assert_ctl_arg.vl106n37pagev_user/tocover_simple_immediate_stmt_106htop.t.cover_simple_immediate_stmt_106' 1
C 'ft/t_assert_ctl_arg.vl106n40pagev_user/tocover_final_deferred_immediate_106htop.t.cover_final_deferred_immediate_106' 1
C 'ft/t_assert_ctl_arg.vl106n43pagev_user/tocover_observed_deferred_immediate_106htop.t.cover_observed_deferred_immediate_106' 1
C 'ft/t_assert_ctl_arg.vl106n45pagev_user/tocover_final_deferred_immediate_stmt_106htop.t.cover_final_deferred_immediate_stmt_106' 1
C 'ft/t_assert_ctl_arg.vl106n48pagev_user/tocover_observed_deferred_immediate_stmt_106htop.t.cover_observed_deferred_immediate_stmt_106' 1
C 'ft/t_assert_ctl_arg.vl108n32pagev_user/tocover_simple_immediate_108htop.t.cover_simple_immediate_108' 1
C 'ft/t_assert_ctl_arg.vl108n37pagev_user/tocover_simple_immediate_stmt_108htop.t.cover_simple_immediate_stmt_108' 1
C 'ft/t_assert_ctl_arg.vl108n40pagev_user/tocover_final_deferred_immediate_108htop.t.cover_final_deferred_immediate_108' 1
C 'ft/t_assert_ctl_arg.vl108n43pagev_user/tocover_observed_deferred_immediate_108htop.t.cover_observed_deferred_immediate_108' 1
C 'ft/t_assert_ctl_arg.vl108n45pagev_user/tocover_final_deferred_immediate_stmt_108htop.t.cover_final_deferred_immediate_stmt_108' 1
C 'ft/t_assert_ctl_arg.vl108n48pagev_user/tocover_observed_deferred_immediate_stmt_108htop.t.cover_observed_deferred_immediate_stmt_108' 1
C 'ft/t_assert_ctl_arg.vl110n32pagev_user/tocover_simple_immediate_110htop.t.cover_simple_immediate_110' 0
C 'ft/t_assert_ctl_arg.vl110n37pagev_user/tocover_simple_immediate_stmt_110htop.t.cover_simple_immediate_stmt_110' 0
C 'ft/t_assert_ctl_arg.vl110n40pagev_user/tocover_final_deferred_immediate_110htop.t.cover_final_deferred_immediate_110' 0
C 'ft/t_assert_ctl_arg.vl110n43pagev_user/tocover_observed_deferred_immediate_110htop.t.cover_observed_deferred_immediate_110' 0
C 'ft/t_assert_ctl_arg.vl110n45pagev_user/tocover_final_deferred_immediate_stmt_110htop.t.cover_final_deferred_immediate_stmt_110' 0
C 'ft/t_assert_ctl_arg.vl110n48pagev_user/tocover_observed_deferred_immediate_stmt_110htop.t.cover_observed_deferred_immediate_stmt_110' 0
C 'ft/t_assert_ctl_arg.vl112n32pagev_user/tocover_simple_immediate_112htop.t.cover_simple_immediate_112' 1
C 'ft/t_assert_ctl_arg.vl112n37pagev_user/tocover_simple_immediate_stmt_112htop.t.cover_simple_immediate_stmt_112' 1
C 'ft/t_assert_ctl_arg.vl112n40pagev_user/tocover_final_deferred_immediate_112htop.t.cover_final_deferred_immediate_112' 1
C 'ft/t_assert_ctl_arg.vl112n43pagev_user/tocover_observed_deferred_immediate_112htop.t.cover_observed_deferred_immediate_112' 0
C 'ft/t_assert_ctl_arg.vl112n45pagev_user/tocover_final_deferred_immediate_stmt_112htop.t.cover_final_deferred_immediate_stmt_112' 1
C 'ft/t_assert_ctl_arg.vl112n48pagev_user/tocover_observed_deferred_immediate_stmt_112htop.t.cover_observed_deferred_immediate_stmt_112' 0
C 'ft/t_assert_ctl_arg.vl192n22pagev_user/concurrentocover_concurrenthtop.t.concurrent.cover_concurrent' 0
C 'ft/t_assert_ctl_arg.vl193n27pagev_user/concurrentocover_concurrent_stmthtop.t.concurrent.cover_concurrent_stmt' 0
C 'ft/t_assert_ctl_arg.vl49n31pagev_user/tocover_simple_immediate_49htop.t.cover_simple_immediate_49' 1
C 'ft/t_assert_ctl_arg.vl49n36pagev_user/tocover_simple_immediate_stmt_49htop.t.cover_simple_immediate_stmt_49' 1
C 'ft/t_assert_ctl_arg.vl49n39pagev_user/tocover_final_deferred_immediate_49htop.t.cover_final_deferred_immediate_49' 0
C 'ft/t_assert_ctl_arg.vl49n42pagev_user/tocover_observed_deferred_immediate_49htop.t.cover_observed_deferred_immediate_49' 0
C 'ft/t_assert_ctl_arg.vl49n44pagev_user/tocover_final_deferred_immediate_stmt_49htop.t.cover_final_deferred_immediate_stmt_49' 0
C 'ft/t_assert_ctl_arg.vl49n47pagev_user/tocover_observed_deferred_immediate_stmt_49htop.t.cover_observed_deferred_immediate_stmt_49' 0
C 'ft/t_assert_ctl_arg.vl51n31pagev_user/tocover_simple_immediate_51htop.t.cover_simple_immediate_51' 0
C 'ft/t_assert_ctl_arg.vl51n36pagev_user/tocover_simple_immediate_stmt_51htop.t.cover_simple_immediate_stmt_51' 0
C 'ft/t_assert_ctl_arg.vl51n39pagev_user/tocover_final_deferred_immediate_51htop.t.cover_final_deferred_immediate_51' 0
C 'ft/t_assert_ctl_arg.vl51n42pagev_user/tocover_observed_deferred_immediate_51htop.t.cover_observed_deferred_immediate_51' 0
C 'ft/t_assert_ctl_arg.vl51n44pagev_user/tocover_final_deferred_immediate_stmt_51htop.t.cover_final_deferred_immediate_stmt_51' 0
C 'ft/t_assert_ctl_arg.vl51n47pagev_user/tocover_observed_deferred_immediate_stmt_51htop.t.cover_observed_deferred_immediate_stmt_51' 0
C 'ft/t_assert_ctl_arg.vl56n31pagev_user/tocover_simple_immediate_56htop.t.cover_simple_immediate_56' 0
C 'ft/t_assert_ctl_arg.vl56n36pagev_user/tocover_simple_immediate_stmt_56htop.t.cover_simple_immediate_stmt_56' 0
C 'ft/t_assert_ctl_arg.vl56n39pagev_user/tocover_final_deferred_immediate_56htop.t.cover_final_deferred_immediate_56' 0
C 'ft/t_assert_ctl_arg.vl56n42pagev_user/tocover_observed_deferred_immediate_56htop.t.cover_observed_deferred_immediate_56' 1
C 'ft/t_assert_ctl_arg.vl56n44pagev_user/tocover_final_deferred_immediate_stmt_56htop.t.cover_final_deferred_immediate_stmt_56' 0
C 'ft/t_assert_ctl_arg.vl56n47pagev_user/tocover_observed_deferred_immediate_stmt_56htop.t.cover_observed_deferred_immediate_stmt_56' 1
C 'ft/t_assert_ctl_arg.vl58n31pagev_user/tocover_simple_immediate_58htop.t.cover_simple_immediate_58' 0
C 'ft/t_assert_ctl_arg.vl58n36pagev_user/tocover_simple_immediate_stmt_58htop.t.cover_simple_immediate_stmt_58' 0
C 'ft/t_assert_ctl_arg.vl58n39pagev_user/tocover_final_deferred_immediate_58htop.t.cover_final_deferred_immediate_58' 0
C 'ft/t_assert_ctl_arg.vl58n42pagev_user/tocover_observed_deferred_immediate_58htop.t.cover_observed_deferred_immediate_58' 0
C 'ft/t_assert_ctl_arg.vl58n44pagev_user/tocover_final_deferred_immediate_stmt_58htop.t.cover_final_deferred_immediate_stmt_58' 0
C 'ft/t_assert_ctl_arg.vl58n47pagev_user/tocover_observed_deferred_immediate_stmt_58htop.t.cover_observed_deferred_immediate_stmt_58' 0
C 'ft/t_assert_ctl_arg.vl63n31pagev_user/tocover_simple_immediate_63htop.t.cover_simple_immediate_63' 0
C 'ft/t_assert_ctl_arg.vl63n36pagev_user/tocover_simple_immediate_stmt_63htop.t.cover_simple_immediate_stmt_63' 0
C 'ft/t_assert_ctl_arg.vl63n39pagev_user/tocover_final_deferred_immediate_63htop.t.cover_final_deferred_immediate_63' 1
C 'ft/t_assert_ctl_arg.vl63n42pagev_user/tocover_observed_deferred_immediate_63htop.t.cover_observed_deferred_immediate_63' 0
C 'ft/t_assert_ctl_arg.vl63n44pagev_user/tocover_final_deferred_immediate_stmt_63htop.t.cover_final_deferred_immediate_stmt_63' 1
C 'ft/t_assert_ctl_arg.vl63n47pagev_user/tocover_observed_deferred_immediate_stmt_63htop.t.cover_observed_deferred_immediate_stmt_63' 0
C 'ft/t_assert_ctl_arg.vl65n31pagev_user/tocover_simple_immediate_65htop.t.cover_simple_immediate_65' 0
C 'ft/t_assert_ctl_arg.vl65n36pagev_user/tocover_simple_immediate_stmt_65htop.t.cover_simple_immediate_stmt_65' 0
C 'ft/t_assert_ctl_arg.vl65n39pagev_user/tocover_final_deferred_immediate_65htop.t.cover_final_deferred_immediate_65' 0
C 'ft/t_assert_ctl_arg.vl65n42pagev_user/tocover_observed_deferred_immediate_65htop.t.cover_observed_deferred_immediate_65' 0
C 'ft/t_assert_ctl_arg.vl65n44pagev_user/tocover_final_deferred_immediate_stmt_65htop.t.cover_final_deferred_immediate_stmt_65' 0
C 'ft/t_assert_ctl_arg.vl65n47pagev_user/tocover_observed_deferred_immediate_stmt_65htop.t.cover_observed_deferred_immediate_stmt_65' 0
C 'ft/t_assert_ctl_arg.vl69n31pagev_user/tocover_simple_immediate_69htop.t.cover_simple_immediate_69' 0
C 'ft/t_assert_ctl_arg.vl69n36pagev_user/tocover_simple_immediate_stmt_69htop.t.cover_simple_immediate_stmt_69' 0
C 'ft/t_assert_ctl_arg.vl69n39pagev_user/tocover_final_deferred_immediate_69htop.t.cover_final_deferred_immediate_69' 0
C 'ft/t_assert_ctl_arg.vl69n42pagev_user/tocover_observed_deferred_immediate_69htop.t.cover_observed_deferred_immediate_69' 0
C 'ft/t_assert_ctl_arg.vl69n44pagev_user/tocover_final_deferred_immediate_stmt_69htop.t.cover_final_deferred_immediate_stmt_69' 0
C 'ft/t_assert_ctl_arg.vl69n47pagev_user/tocover_observed_deferred_immediate_stmt_69htop.t.cover_observed_deferred_immediate_stmt_69' 0
C 'ft/t_assert_ctl_arg.vl71n31pagev_user/tocover_simple_immediate_71htop.t.cover_simple_immediate_71' 1
C 'ft/t_assert_ctl_arg.vl71n36pagev_user/tocover_simple_immediate_stmt_71htop.t.cover_simple_immediate_stmt_71' 1
C 'ft/t_assert_ctl_arg.vl71n39pagev_user/tocover_final_deferred_immediate_71htop.t.cover_final_deferred_immediate_71' 1
C 'ft/t_assert_ctl_arg.vl71n42pagev_user/tocover_observed_deferred_immediate_71htop.t.cover_observed_deferred_immediate_71' 1
C 'ft/t_assert_ctl_arg.vl71n44pagev_user/tocover_final_deferred_immediate_stmt_71htop.t.cover_final_deferred_immediate_stmt_71' 1
C 'ft/t_assert_ctl_arg.vl71n47pagev_user/tocover_observed_deferred_immediate_stmt_71htop.t.cover_observed_deferred_immediate_stmt_71' 1
C 'ft/t_assert_ctl_arg.vl73n31pagev_user/tocover_simple_immediate_73htop.t.cover_simple_immediate_73' 0
C 'ft/t_assert_ctl_arg.vl73n36pagev_user/tocover_simple_immediate_stmt_73htop.t.cover_simple_immediate_stmt_73' 0
C 'ft/t_assert_ctl_arg.vl73n39pagev_user/tocover_final_deferred_immediate_73htop.t.cover_final_deferred_immediate_73' 0
C 'ft/t_assert_ctl_arg.vl73n42pagev_user/tocover_observed_deferred_immediate_73htop.t.cover_observed_deferred_immediate_73' 0
C 'ft/t_assert_ctl_arg.vl73n44pagev_user/tocover_final_deferred_immediate_stmt_73htop.t.cover_final_deferred_immediate_stmt_73' 0
C 'ft/t_assert_ctl_arg.vl73n47pagev_user/tocover_observed_deferred_immediate_stmt_73htop.t.cover_observed_deferred_immediate_stmt_73' 0
C 'ft/t_assert_ctl_arg.vl76n31pagev_user/tocover_simple_immediate_76htop.t.cover_simple_immediate_76' 1
C 'ft/t_assert_ctl_arg.vl76n36pagev_user/tocover_simple_immediate_stmt_76htop.t.cover_simple_immediate_stmt_76' 1
C 'ft/t_assert_ctl_arg.vl76n39pagev_user/tocover_final_deferred_immediate_76htop.t.cover_final_deferred_immediate_76' 0
C 'ft/t_assert_ctl_arg.vl76n42pagev_user/tocover_observed_deferred_immediate_76htop.t.cover_observed_deferred_immediate_76' 1
C 'ft/t_assert_ctl_arg.vl76n44pagev_user/tocover_final_deferred_immediate_stmt_76htop.t.cover_final_deferred_immediate_stmt_76' 0
C 'ft/t_assert_ctl_arg.vl76n47pagev_user/tocover_observed_deferred_immediate_stmt_76htop.t.cover_observed_deferred_immediate_stmt_76' 1
C 'ft/t_assert_ctl_arg.vl78n31pagev_user/tocover_simple_immediate_78htop.t.cover_simple_immediate_78' 1
C 'ft/t_assert_ctl_arg.vl78n36pagev_user/tocover_simple_immediate_stmt_78htop.t.cover_simple_immediate_stmt_78' 1
C 'ft/t_assert_ctl_arg.vl78n39pagev_user/tocover_final_deferred_immediate_78htop.t.cover_final_deferred_immediate_78' 1
C 'ft/t_assert_ctl_arg.vl78n42pagev_user/tocover_observed_deferred_immediate_78htop.t.cover_observed_deferred_immediate_78' 1
C 'ft/t_assert_ctl_arg.vl78n44pagev_user/tocover_final_deferred_immediate_stmt_78htop.t.cover_final_deferred_immediate_stmt_78' 1
C 'ft/t_assert_ctl_arg.vl78n47pagev_user/tocover_observed_deferred_immediate_stmt_78htop.t.cover_observed_deferred_immediate_stmt_78' 1
C 'ft/t_assert_ctl_arg.vl80n31pagev_user/tocover_simple_immediate_80htop.t.cover_simple_immediate_80' 1
C 'ft/t_assert_ctl_arg.vl80n36pagev_user/tocover_simple_immediate_stmt_80htop.t.cover_simple_immediate_stmt_80' 1
C 'ft/t_assert_ctl_arg.vl80n39pagev_user/tocover_final_deferred_immediate_80htop.t.cover_final_deferred_immediate_80' 0
C 'ft/t_assert_ctl_arg.vl80n42pagev_user/tocover_observed_deferred_immediate_80htop.t.cover_observed_deferred_immediate_80' 0
C 'ft/t_assert_ctl_arg.vl80n44pagev_user/tocover_final_deferred_immediate_stmt_80htop.t.cover_final_deferred_immediate_stmt_80' 0
C 'ft/t_assert_ctl_arg.vl80n47pagev_user/tocover_observed_deferred_immediate_stmt_80htop.t.cover_observed_deferred_immediate_stmt_80' 0
C 'ft/t_assert_ctl_arg.vl82n31pagev_user/tocover_simple_immediate_82htop.t.cover_simple_immediate_82' 1
C 'ft/t_assert_ctl_arg.vl82n36pagev_user/tocover_simple_immediate_stmt_82htop.t.cover_simple_immediate_stmt_82' 1
C 'ft/t_assert_ctl_arg.vl82n39pagev_user/tocover_final_deferred_immediate_82htop.t.cover_final_deferred_immediate_82' 0
C 'ft/t_assert_ctl_arg.vl82n42pagev_user/tocover_observed_deferred_immediate_82htop.t.cover_observed_deferred_immediate_82' 0
C 'ft/t_assert_ctl_arg.vl82n44pagev_user/tocover_final_deferred_immediate_stmt_82htop.t.cover_final_deferred_immediate_stmt_82' 0
C 'ft/t_assert_ctl_arg.vl82n47pagev_user/tocover_observed_deferred_immediate_stmt_82htop.t.cover_observed_deferred_immediate_stmt_82' 0
C 'ft/t_assert_ctl_arg.vl84n31pagev_user/tocover_simple_immediate_84htop.t.cover_simple_immediate_84' 0
C 'ft/t_assert_ctl_arg.vl84n36pagev_user/tocover_simple_immediate_stmt_84htop.t.cover_simple_immediate_stmt_84' 0
C 'ft/t_assert_ctl_arg.vl84n39pagev_user/tocover_final_deferred_immediate_84htop.t.cover_final_deferred_immediate_84' 0
C 'ft/t_assert_ctl_arg.vl84n42pagev_user/tocover_observed_deferred_immediate_84htop.t.cover_observed_deferred_immediate_84' 0
C 'ft/t_assert_ctl_arg.vl84n44pagev_user/tocover_final_deferred_immediate_stmt_84htop.t.cover_final_deferred_immediate_stmt_84' 0
C 'ft/t_assert_ctl_arg.vl84n47pagev_user/tocover_observed_deferred_immediate_stmt_84htop.t.cover_observed_deferred_immediate_stmt_84' 0
C 'ft/t_assert_ctl_arg.vl86n31pagev_user/tocover_simple_immediate_86htop.t.cover_simple_immediate_86' 1
C 'ft/t_assert_ctl_arg.vl86n36pagev_user/tocover_simple_immediate_stmt_86htop.t.cover_simple_immediate_stmt_86' 1
C 'ft/t_assert_ctl_arg.vl86n39pagev_user/tocover_final_deferred_immediate_86htop.t.cover_final_deferred_immediate_86' 0
C 'ft/t_assert_ctl_arg.vl86n42pagev_user/tocover_observed_deferred_immediate_86htop.t.cover_observed_deferred_immediate_86' 0
C 'ft/t_assert_ctl_arg.vl86n44pagev_user/tocover_final_deferred_immediate_stmt_86htop.t.cover_final_deferred_immediate_stmt_86' 0
C 'ft/t_assert_ctl_arg.vl86n47pagev_user/tocover_observed_deferred_immediate_stmt_86htop.t.cover_observed_deferred_immediate_stmt_86' 0
C 'ft/t_assert_ctl_arg.vl88n31pagev_user/tocover_simple_immediate_88htop.t.cover_simple_immediate_88' 0
C 'ft/t_assert_ctl_arg.vl88n36pagev_user/tocover_simple_immediate_stmt_88htop.t.cover_simple_immediate_stmt_88' 0
C 'ft/t_assert_ctl_arg.vl88n39pagev_user/tocover_final_deferred_immediate_88htop.t.cover_final_deferred_immediate_88' 0
C 'ft/t_assert_ctl_arg.vl88n42pagev_user/tocover_observed_deferred_immediate_88htop.t.cover_observed_deferred_immediate_88' 0
C 'ft/t_assert_ctl_arg.vl88n44pagev_user/tocover_final_deferred_immediate_stmt_88htop.t.cover_final_deferred_immediate_stmt_88' 0
C 'ft/t_assert_ctl_arg.vl88n47pagev_user/tocover_observed_deferred_immediate_stmt_88htop.t.cover_observed_deferred_immediate_stmt_88' 0
C 'ft/t_assert_ctl_arg.vl90n31pagev_user/tocover_simple_immediate_90htop.t.cover_simple_immediate_90' 1
C 'ft/t_assert_ctl_arg.vl90n36pagev_user/tocover_simple_immediate_stmt_90htop.t.cover_simple_immediate_stmt_90' 1
C 'ft/t_assert_ctl_arg.vl90n39pagev_user/tocover_final_deferred_immediate_90htop.t.cover_final_deferred_immediate_90' 1
C 'ft/t_assert_ctl_arg.vl90n42pagev_user/tocover_observed_deferred_immediate_90htop.t.cover_observed_deferred_immediate_90' 1
C 'ft/t_assert_ctl_arg.vl90n44pagev_user/tocover_final_deferred_immediate_stmt_90htop.t.cover_final_deferred_immediate_stmt_90' 1
C 'ft/t_assert_ctl_arg.vl90n47pagev_user/tocover_observed_deferred_immediate_stmt_90htop.t.cover_observed_deferred_immediate_stmt_90' 1
C 'ft/t_assert_ctl_arg.vl92n31pagev_user/tocover_simple_immediate_92htop.t.cover_simple_immediate_92' 0
C 'ft/t_assert_ctl_arg.vl92n36pagev_user/tocover_simple_immediate_stmt_92htop.t.cover_simple_immediate_stmt_92' 0
C 'ft/t_assert_ctl_arg.vl92n39pagev_user/tocover_final_deferred_immediate_92htop.t.cover_final_deferred_immediate_92' 0
C 'ft/t_assert_ctl_arg.vl92n42pagev_user/tocover_observed_deferred_immediate_92htop.t.cover_observed_deferred_immediate_92' 0
C 'ft/t_assert_ctl_arg.vl92n44pagev_user/tocover_final_deferred_immediate_stmt_92htop.t.cover_final_deferred_immediate_stmt_92' 0
C 'ft/t_assert_ctl_arg.vl92n47pagev_user/tocover_observed_deferred_immediate_stmt_92htop.t.cover_observed_deferred_immediate_stmt_92' 0
C 'ft/t_assert_ctl_arg.vl97n31pagev_user/tocover_simple_immediate_97htop.t.cover_simple_immediate_97' 0
C 'ft/t_assert_ctl_arg.vl97n36pagev_user/tocover_simple_immediate_stmt_97htop.t.cover_simple_immediate_stmt_97' 0
C 'ft/t_assert_ctl_arg.vl97n39pagev_user/tocover_final_deferred_immediate_97htop.t.cover_final_deferred_immediate_97' 0
C 'ft/t_assert_ctl_arg.vl97n42pagev_user/tocover_observed_deferred_immediate_97htop.t.cover_observed_deferred_immediate_97' 0
C 'ft/t_assert_ctl_arg.vl97n44pagev_user/tocover_final_deferred_immediate_stmt_97htop.t.cover_final_deferred_immediate_stmt_97' 0
C 'ft/t_assert_ctl_arg.vl97n47pagev_user/tocover_observed_deferred_immediate_stmt_97htop.t.cover_observed_deferred_immediate_stmt_97' 0
C 'ft/t_assert_ctl_arg.vl100n32tuserpagev_user/tocover_simple_immediate_100htop.t.cover_simple_immediate_100' 1
C 'ft/t_assert_ctl_arg.vl100n37tuserpagev_user/tocover_simple_immediate_stmt_100htop.t.cover_simple_immediate_stmt_100' 1
C 'ft/t_assert_ctl_arg.vl100n40tuserpagev_user/tocover_final_deferred_immediate_100htop.t.cover_final_deferred_immediate_100' 1
C 'ft/t_assert_ctl_arg.vl100n43tuserpagev_user/tocover_observed_deferred_immediate_100htop.t.cover_observed_deferred_immediate_100' 1
C 'ft/t_assert_ctl_arg.vl100n45tuserpagev_user/tocover_final_deferred_immediate_stmt_100htop.t.cover_final_deferred_immediate_stmt_100' 1
C 'ft/t_assert_ctl_arg.vl100n48tuserpagev_user/tocover_observed_deferred_immediate_stmt_100htop.t.cover_observed_deferred_immediate_stmt_100' 1
C 'ft/t_assert_ctl_arg.vl103n32tuserpagev_user/tocover_simple_immediate_103htop.t.cover_simple_immediate_103' 0
C 'ft/t_assert_ctl_arg.vl103n37tuserpagev_user/tocover_simple_immediate_stmt_103htop.t.cover_simple_immediate_stmt_103' 0
C 'ft/t_assert_ctl_arg.vl103n40tuserpagev_user/tocover_final_deferred_immediate_103htop.t.cover_final_deferred_immediate_103' 0
C 'ft/t_assert_ctl_arg.vl103n43tuserpagev_user/tocover_observed_deferred_immediate_103htop.t.cover_observed_deferred_immediate_103' 0
C 'ft/t_assert_ctl_arg.vl103n45tuserpagev_user/tocover_final_deferred_immediate_stmt_103htop.t.cover_final_deferred_immediate_stmt_103' 0
C 'ft/t_assert_ctl_arg.vl103n48tuserpagev_user/tocover_observed_deferred_immediate_stmt_103htop.t.cover_observed_deferred_immediate_stmt_103' 0
C 'ft/t_assert_ctl_arg.vl106n32tuserpagev_user/tocover_simple_immediate_106htop.t.cover_simple_immediate_106' 1
C 'ft/t_assert_ctl_arg.vl106n37tuserpagev_user/tocover_simple_immediate_stmt_106htop.t.cover_simple_immediate_stmt_106' 1
C 'ft/t_assert_ctl_arg.vl106n40tuserpagev_user/tocover_final_deferred_immediate_106htop.t.cover_final_deferred_immediate_106' 1
C 'ft/t_assert_ctl_arg.vl106n43tuserpagev_user/tocover_observed_deferred_immediate_106htop.t.cover_observed_deferred_immediate_106' 1
C 'ft/t_assert_ctl_arg.vl106n45tuserpagev_user/tocover_final_deferred_immediate_stmt_106htop.t.cover_final_deferred_immediate_stmt_106' 1
C 'ft/t_assert_ctl_arg.vl106n48tuserpagev_user/tocover_observed_deferred_immediate_stmt_106htop.t.cover_observed_deferred_immediate_stmt_106' 1
C 'ft/t_assert_ctl_arg.vl108n32tuserpagev_user/tocover_simple_immediate_108htop.t.cover_simple_immediate_108' 1
C 'ft/t_assert_ctl_arg.vl108n37tuserpagev_user/tocover_simple_immediate_stmt_108htop.t.cover_simple_immediate_stmt_108' 1
C 'ft/t_assert_ctl_arg.vl108n40tuserpagev_user/tocover_final_deferred_immediate_108htop.t.cover_final_deferred_immediate_108' 1
C 'ft/t_assert_ctl_arg.vl108n43tuserpagev_user/tocover_observed_deferred_immediate_108htop.t.cover_observed_deferred_immediate_108' 1
C 'ft/t_assert_ctl_arg.vl108n45tuserpagev_user/tocover_final_deferred_immediate_stmt_108htop.t.cover_final_deferred_immediate_stmt_108' 1
C 'ft/t_assert_ctl_arg.vl108n48tuserpagev_user/tocover_observed_deferred_immediate_stmt_108htop.t.cover_observed_deferred_immediate_stmt_108' 1
C 'ft/t_assert_ctl_arg.vl110n32tuserpagev_user/tocover_simple_immediate_110htop.t.cover_simple_immediate_110' 0
C 'ft/t_assert_ctl_arg.vl110n37tuserpagev_user/tocover_simple_immediate_stmt_110htop.t.cover_simple_immediate_stmt_110' 0
C 'ft/t_assert_ctl_arg.vl110n40tuserpagev_user/tocover_final_deferred_immediate_110htop.t.cover_final_deferred_immediate_110' 0
C 'ft/t_assert_ctl_arg.vl110n43tuserpagev_user/tocover_observed_deferred_immediate_110htop.t.cover_observed_deferred_immediate_110' 0
C 'ft/t_assert_ctl_arg.vl110n45tuserpagev_user/tocover_final_deferred_immediate_stmt_110htop.t.cover_final_deferred_immediate_stmt_110' 0
C 'ft/t_assert_ctl_arg.vl110n48tuserpagev_user/tocover_observed_deferred_immediate_stmt_110htop.t.cover_observed_deferred_immediate_stmt_110' 0
C 'ft/t_assert_ctl_arg.vl112n32tuserpagev_user/tocover_simple_immediate_112htop.t.cover_simple_immediate_112' 1
C 'ft/t_assert_ctl_arg.vl112n37tuserpagev_user/tocover_simple_immediate_stmt_112htop.t.cover_simple_immediate_stmt_112' 1
C 'ft/t_assert_ctl_arg.vl112n40tuserpagev_user/tocover_final_deferred_immediate_112htop.t.cover_final_deferred_immediate_112' 1
C 'ft/t_assert_ctl_arg.vl112n43tuserpagev_user/tocover_observed_deferred_immediate_112htop.t.cover_observed_deferred_immediate_112' 0
C 'ft/t_assert_ctl_arg.vl112n45tuserpagev_user/tocover_final_deferred_immediate_stmt_112htop.t.cover_final_deferred_immediate_stmt_112' 1
C 'ft/t_assert_ctl_arg.vl112n48tuserpagev_user/tocover_observed_deferred_immediate_stmt_112htop.t.cover_observed_deferred_immediate_stmt_112' 0
C 'ft/t_assert_ctl_arg.vl192n22tuserpagev_user/concurrentocover_concurrenthtop.t.concurrent.cover_concurrent' 0
C 'ft/t_assert_ctl_arg.vl193n27tuserpagev_user/concurrentocover_concurrent_stmthtop.t.concurrent.cover_concurrent_stmt' 0
C 'ft/t_assert_ctl_arg.vl49n31tuserpagev_user/tocover_simple_immediate_49htop.t.cover_simple_immediate_49' 1
C 'ft/t_assert_ctl_arg.vl49n36tuserpagev_user/tocover_simple_immediate_stmt_49htop.t.cover_simple_immediate_stmt_49' 1
C 'ft/t_assert_ctl_arg.vl49n39tuserpagev_user/tocover_final_deferred_immediate_49htop.t.cover_final_deferred_immediate_49' 0
C 'ft/t_assert_ctl_arg.vl49n42tuserpagev_user/tocover_observed_deferred_immediate_49htop.t.cover_observed_deferred_immediate_49' 0
C 'ft/t_assert_ctl_arg.vl49n44tuserpagev_user/tocover_final_deferred_immediate_stmt_49htop.t.cover_final_deferred_immediate_stmt_49' 0
C 'ft/t_assert_ctl_arg.vl49n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_49htop.t.cover_observed_deferred_immediate_stmt_49' 0
C 'ft/t_assert_ctl_arg.vl51n31tuserpagev_user/tocover_simple_immediate_51htop.t.cover_simple_immediate_51' 0
C 'ft/t_assert_ctl_arg.vl51n36tuserpagev_user/tocover_simple_immediate_stmt_51htop.t.cover_simple_immediate_stmt_51' 0
C 'ft/t_assert_ctl_arg.vl51n39tuserpagev_user/tocover_final_deferred_immediate_51htop.t.cover_final_deferred_immediate_51' 0
C 'ft/t_assert_ctl_arg.vl51n42tuserpagev_user/tocover_observed_deferred_immediate_51htop.t.cover_observed_deferred_immediate_51' 0
C 'ft/t_assert_ctl_arg.vl51n44tuserpagev_user/tocover_final_deferred_immediate_stmt_51htop.t.cover_final_deferred_immediate_stmt_51' 0
C 'ft/t_assert_ctl_arg.vl51n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_51htop.t.cover_observed_deferred_immediate_stmt_51' 0
C 'ft/t_assert_ctl_arg.vl56n31tuserpagev_user/tocover_simple_immediate_56htop.t.cover_simple_immediate_56' 0
C 'ft/t_assert_ctl_arg.vl56n36tuserpagev_user/tocover_simple_immediate_stmt_56htop.t.cover_simple_immediate_stmt_56' 0
C 'ft/t_assert_ctl_arg.vl56n39tuserpagev_user/tocover_final_deferred_immediate_56htop.t.cover_final_deferred_immediate_56' 0
C 'ft/t_assert_ctl_arg.vl56n42tuserpagev_user/tocover_observed_deferred_immediate_56htop.t.cover_observed_deferred_immediate_56' 1
C 'ft/t_assert_ctl_arg.vl56n44tuserpagev_user/tocover_final_deferred_immediate_stmt_56htop.t.cover_final_deferred_immediate_stmt_56' 0
C 'ft/t_assert_ctl_arg.vl56n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_56htop.t.cover_observed_deferred_immediate_stmt_56' 1
C 'ft/t_assert_ctl_arg.vl58n31tuserpagev_user/tocover_simple_immediate_58htop.t.cover_simple_immediate_58' 0
C 'ft/t_assert_ctl_arg.vl58n36tuserpagev_user/tocover_simple_immediate_stmt_58htop.t.cover_simple_immediate_stmt_58' 0
C 'ft/t_assert_ctl_arg.vl58n39tuserpagev_user/tocover_final_deferred_immediate_58htop.t.cover_final_deferred_immediate_58' 0
C 'ft/t_assert_ctl_arg.vl58n42tuserpagev_user/tocover_observed_deferred_immediate_58htop.t.cover_observed_deferred_immediate_58' 0
C 'ft/t_assert_ctl_arg.vl58n44tuserpagev_user/tocover_final_deferred_immediate_stmt_58htop.t.cover_final_deferred_immediate_stmt_58' 0
C 'ft/t_assert_ctl_arg.vl58n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_58htop.t.cover_observed_deferred_immediate_stmt_58' 0
C 'ft/t_assert_ctl_arg.vl63n31tuserpagev_user/tocover_simple_immediate_63htop.t.cover_simple_immediate_63' 0
C 'ft/t_assert_ctl_arg.vl63n36tuserpagev_user/tocover_simple_immediate_stmt_63htop.t.cover_simple_immediate_stmt_63' 0
C 'ft/t_assert_ctl_arg.vl63n39tuserpagev_user/tocover_final_deferred_immediate_63htop.t.cover_final_deferred_immediate_63' 1
C 'ft/t_assert_ctl_arg.vl63n42tuserpagev_user/tocover_observed_deferred_immediate_63htop.t.cover_observed_deferred_immediate_63' 0
C 'ft/t_assert_ctl_arg.vl63n44tuserpagev_user/tocover_final_deferred_immediate_stmt_63htop.t.cover_final_deferred_immediate_stmt_63' 1
C 'ft/t_assert_ctl_arg.vl63n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_63htop.t.cover_observed_deferred_immediate_stmt_63' 0
C 'ft/t_assert_ctl_arg.vl65n31tuserpagev_user/tocover_simple_immediate_65htop.t.cover_simple_immediate_65' 0
C 'ft/t_assert_ctl_arg.vl65n36tuserpagev_user/tocover_simple_immediate_stmt_65htop.t.cover_simple_immediate_stmt_65' 0
C 'ft/t_assert_ctl_arg.vl65n39tuserpagev_user/tocover_final_deferred_immediate_65htop.t.cover_final_deferred_immediate_65' 0
C 'ft/t_assert_ctl_arg.vl65n42tuserpagev_user/tocover_observed_deferred_immediate_65htop.t.cover_observed_deferred_immediate_65' 0
C 'ft/t_assert_ctl_arg.vl65n44tuserpagev_user/tocover_final_deferred_immediate_stmt_65htop.t.cover_final_deferred_immediate_stmt_65' 0
C 'ft/t_assert_ctl_arg.vl65n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_65htop.t.cover_observed_deferred_immediate_stmt_65' 0
C 'ft/t_assert_ctl_arg.vl69n31tuserpagev_user/tocover_simple_immediate_69htop.t.cover_simple_immediate_69' 0
C 'ft/t_assert_ctl_arg.vl69n36tuserpagev_user/tocover_simple_immediate_stmt_69htop.t.cover_simple_immediate_stmt_69' 0
C 'ft/t_assert_ctl_arg.vl69n39tuserpagev_user/tocover_final_deferred_immediate_69htop.t.cover_final_deferred_immediate_69' 0
C 'ft/t_assert_ctl_arg.vl69n42tuserpagev_user/tocover_observed_deferred_immediate_69htop.t.cover_observed_deferred_immediate_69' 0
C 'ft/t_assert_ctl_arg.vl69n44tuserpagev_user/tocover_final_deferred_immediate_stmt_69htop.t.cover_final_deferred_immediate_stmt_69' 0
C 'ft/t_assert_ctl_arg.vl69n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_69htop.t.cover_observed_deferred_immediate_stmt_69' 0
C 'ft/t_assert_ctl_arg.vl71n31tuserpagev_user/tocover_simple_immediate_71htop.t.cover_simple_immediate_71' 1
C 'ft/t_assert_ctl_arg.vl71n36tuserpagev_user/tocover_simple_immediate_stmt_71htop.t.cover_simple_immediate_stmt_71' 1
C 'ft/t_assert_ctl_arg.vl71n39tuserpagev_user/tocover_final_deferred_immediate_71htop.t.cover_final_deferred_immediate_71' 1
C 'ft/t_assert_ctl_arg.vl71n42tuserpagev_user/tocover_observed_deferred_immediate_71htop.t.cover_observed_deferred_immediate_71' 1
C 'ft/t_assert_ctl_arg.vl71n44tuserpagev_user/tocover_final_deferred_immediate_stmt_71htop.t.cover_final_deferred_immediate_stmt_71' 1
C 'ft/t_assert_ctl_arg.vl71n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_71htop.t.cover_observed_deferred_immediate_stmt_71' 1
C 'ft/t_assert_ctl_arg.vl73n31tuserpagev_user/tocover_simple_immediate_73htop.t.cover_simple_immediate_73' 0
C 'ft/t_assert_ctl_arg.vl73n36tuserpagev_user/tocover_simple_immediate_stmt_73htop.t.cover_simple_immediate_stmt_73' 0
C 'ft/t_assert_ctl_arg.vl73n39tuserpagev_user/tocover_final_deferred_immediate_73htop.t.cover_final_deferred_immediate_73' 0
C 'ft/t_assert_ctl_arg.vl73n42tuserpagev_user/tocover_observed_deferred_immediate_73htop.t.cover_observed_deferred_immediate_73' 0
C 'ft/t_assert_ctl_arg.vl73n44tuserpagev_user/tocover_final_deferred_immediate_stmt_73htop.t.cover_final_deferred_immediate_stmt_73' 0
C 'ft/t_assert_ctl_arg.vl73n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_73htop.t.cover_observed_deferred_immediate_stmt_73' 0
C 'ft/t_assert_ctl_arg.vl76n31tuserpagev_user/tocover_simple_immediate_76htop.t.cover_simple_immediate_76' 1
C 'ft/t_assert_ctl_arg.vl76n36tuserpagev_user/tocover_simple_immediate_stmt_76htop.t.cover_simple_immediate_stmt_76' 1
C 'ft/t_assert_ctl_arg.vl76n39tuserpagev_user/tocover_final_deferred_immediate_76htop.t.cover_final_deferred_immediate_76' 0
C 'ft/t_assert_ctl_arg.vl76n42tuserpagev_user/tocover_observed_deferred_immediate_76htop.t.cover_observed_deferred_immediate_76' 1
C 'ft/t_assert_ctl_arg.vl76n44tuserpagev_user/tocover_final_deferred_immediate_stmt_76htop.t.cover_final_deferred_immediate_stmt_76' 0
C 'ft/t_assert_ctl_arg.vl76n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_76htop.t.cover_observed_deferred_immediate_stmt_76' 1
C 'ft/t_assert_ctl_arg.vl78n31tuserpagev_user/tocover_simple_immediate_78htop.t.cover_simple_immediate_78' 1
C 'ft/t_assert_ctl_arg.vl78n36tuserpagev_user/tocover_simple_immediate_stmt_78htop.t.cover_simple_immediate_stmt_78' 1
C 'ft/t_assert_ctl_arg.vl78n39tuserpagev_user/tocover_final_deferred_immediate_78htop.t.cover_final_deferred_immediate_78' 1
C 'ft/t_assert_ctl_arg.vl78n42tuserpagev_user/tocover_observed_deferred_immediate_78htop.t.cover_observed_deferred_immediate_78' 1
C 'ft/t_assert_ctl_arg.vl78n44tuserpagev_user/tocover_final_deferred_immediate_stmt_78htop.t.cover_final_deferred_immediate_stmt_78' 1
C 'ft/t_assert_ctl_arg.vl78n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_78htop.t.cover_observed_deferred_immediate_stmt_78' 1
C 'ft/t_assert_ctl_arg.vl80n31tuserpagev_user/tocover_simple_immediate_80htop.t.cover_simple_immediate_80' 1
C 'ft/t_assert_ctl_arg.vl80n36tuserpagev_user/tocover_simple_immediate_stmt_80htop.t.cover_simple_immediate_stmt_80' 1
C 'ft/t_assert_ctl_arg.vl80n39tuserpagev_user/tocover_final_deferred_immediate_80htop.t.cover_final_deferred_immediate_80' 0
C 'ft/t_assert_ctl_arg.vl80n42tuserpagev_user/tocover_observed_deferred_immediate_80htop.t.cover_observed_deferred_immediate_80' 0
C 'ft/t_assert_ctl_arg.vl80n44tuserpagev_user/tocover_final_deferred_immediate_stmt_80htop.t.cover_final_deferred_immediate_stmt_80' 0
C 'ft/t_assert_ctl_arg.vl80n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_80htop.t.cover_observed_deferred_immediate_stmt_80' 0
C 'ft/t_assert_ctl_arg.vl82n31tuserpagev_user/tocover_simple_immediate_82htop.t.cover_simple_immediate_82' 1
C 'ft/t_assert_ctl_arg.vl82n36tuserpagev_user/tocover_simple_immediate_stmt_82htop.t.cover_simple_immediate_stmt_82' 1
C 'ft/t_assert_ctl_arg.vl82n39tuserpagev_user/tocover_final_deferred_immediate_82htop.t.cover_final_deferred_immediate_82' 0
C 'ft/t_assert_ctl_arg.vl82n42tuserpagev_user/tocover_observed_deferred_immediate_82htop.t.cover_observed_deferred_immediate_82' 0
C 'ft/t_assert_ctl_arg.vl82n44tuserpagev_user/tocover_final_deferred_immediate_stmt_82htop.t.cover_final_deferred_immediate_stmt_82' 0
C 'ft/t_assert_ctl_arg.vl82n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_82htop.t.cover_observed_deferred_immediate_stmt_82' 0
C 'ft/t_assert_ctl_arg.vl84n31tuserpagev_user/tocover_simple_immediate_84htop.t.cover_simple_immediate_84' 0
C 'ft/t_assert_ctl_arg.vl84n36tuserpagev_user/tocover_simple_immediate_stmt_84htop.t.cover_simple_immediate_stmt_84' 0
C 'ft/t_assert_ctl_arg.vl84n39tuserpagev_user/tocover_final_deferred_immediate_84htop.t.cover_final_deferred_immediate_84' 0
C 'ft/t_assert_ctl_arg.vl84n42tuserpagev_user/tocover_observed_deferred_immediate_84htop.t.cover_observed_deferred_immediate_84' 0
C 'ft/t_assert_ctl_arg.vl84n44tuserpagev_user/tocover_final_deferred_immediate_stmt_84htop.t.cover_final_deferred_immediate_stmt_84' 0
C 'ft/t_assert_ctl_arg.vl84n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_84htop.t.cover_observed_deferred_immediate_stmt_84' 0
C 'ft/t_assert_ctl_arg.vl86n31tuserpagev_user/tocover_simple_immediate_86htop.t.cover_simple_immediate_86' 1
C 'ft/t_assert_ctl_arg.vl86n36tuserpagev_user/tocover_simple_immediate_stmt_86htop.t.cover_simple_immediate_stmt_86' 1
C 'ft/t_assert_ctl_arg.vl86n39tuserpagev_user/tocover_final_deferred_immediate_86htop.t.cover_final_deferred_immediate_86' 0
C 'ft/t_assert_ctl_arg.vl86n42tuserpagev_user/tocover_observed_deferred_immediate_86htop.t.cover_observed_deferred_immediate_86' 0
C 'ft/t_assert_ctl_arg.vl86n44tuserpagev_user/tocover_final_deferred_immediate_stmt_86htop.t.cover_final_deferred_immediate_stmt_86' 0
C 'ft/t_assert_ctl_arg.vl86n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_86htop.t.cover_observed_deferred_immediate_stmt_86' 0
C 'ft/t_assert_ctl_arg.vl88n31tuserpagev_user/tocover_simple_immediate_88htop.t.cover_simple_immediate_88' 0
C 'ft/t_assert_ctl_arg.vl88n36tuserpagev_user/tocover_simple_immediate_stmt_88htop.t.cover_simple_immediate_stmt_88' 0
C 'ft/t_assert_ctl_arg.vl88n39tuserpagev_user/tocover_final_deferred_immediate_88htop.t.cover_final_deferred_immediate_88' 0
C 'ft/t_assert_ctl_arg.vl88n42tuserpagev_user/tocover_observed_deferred_immediate_88htop.t.cover_observed_deferred_immediate_88' 0
C 'ft/t_assert_ctl_arg.vl88n44tuserpagev_user/tocover_final_deferred_immediate_stmt_88htop.t.cover_final_deferred_immediate_stmt_88' 0
C 'ft/t_assert_ctl_arg.vl88n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_88htop.t.cover_observed_deferred_immediate_stmt_88' 0
C 'ft/t_assert_ctl_arg.vl90n31tuserpagev_user/tocover_simple_immediate_90htop.t.cover_simple_immediate_90' 1
C 'ft/t_assert_ctl_arg.vl90n36tuserpagev_user/tocover_simple_immediate_stmt_90htop.t.cover_simple_immediate_stmt_90' 1
C 'ft/t_assert_ctl_arg.vl90n39tuserpagev_user/tocover_final_deferred_immediate_90htop.t.cover_final_deferred_immediate_90' 1
C 'ft/t_assert_ctl_arg.vl90n42tuserpagev_user/tocover_observed_deferred_immediate_90htop.t.cover_observed_deferred_immediate_90' 1
C 'ft/t_assert_ctl_arg.vl90n44tuserpagev_user/tocover_final_deferred_immediate_stmt_90htop.t.cover_final_deferred_immediate_stmt_90' 1
C 'ft/t_assert_ctl_arg.vl90n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_90htop.t.cover_observed_deferred_immediate_stmt_90' 1
C 'ft/t_assert_ctl_arg.vl92n31tuserpagev_user/tocover_simple_immediate_92htop.t.cover_simple_immediate_92' 0
C 'ft/t_assert_ctl_arg.vl92n36tuserpagev_user/tocover_simple_immediate_stmt_92htop.t.cover_simple_immediate_stmt_92' 0
C 'ft/t_assert_ctl_arg.vl92n39tuserpagev_user/tocover_final_deferred_immediate_92htop.t.cover_final_deferred_immediate_92' 0
C 'ft/t_assert_ctl_arg.vl92n42tuserpagev_user/tocover_observed_deferred_immediate_92htop.t.cover_observed_deferred_immediate_92' 0
C 'ft/t_assert_ctl_arg.vl92n44tuserpagev_user/tocover_final_deferred_immediate_stmt_92htop.t.cover_final_deferred_immediate_stmt_92' 0
C 'ft/t_assert_ctl_arg.vl92n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_92htop.t.cover_observed_deferred_immediate_stmt_92' 0
C 'ft/t_assert_ctl_arg.vl97n31tuserpagev_user/tocover_simple_immediate_97htop.t.cover_simple_immediate_97' 0
C 'ft/t_assert_ctl_arg.vl97n36tuserpagev_user/tocover_simple_immediate_stmt_97htop.t.cover_simple_immediate_stmt_97' 0
C 'ft/t_assert_ctl_arg.vl97n39tuserpagev_user/tocover_final_deferred_immediate_97htop.t.cover_final_deferred_immediate_97' 0
C 'ft/t_assert_ctl_arg.vl97n42tuserpagev_user/tocover_observed_deferred_immediate_97htop.t.cover_observed_deferred_immediate_97' 0
C 'ft/t_assert_ctl_arg.vl97n44tuserpagev_user/tocover_final_deferred_immediate_stmt_97htop.t.cover_final_deferred_immediate_stmt_97' 0
C 'ft/t_assert_ctl_arg.vl97n47tuserpagev_user/tocover_observed_deferred_immediate_stmt_97htop.t.cover_observed_deferred_immediate_stmt_97' 0

12
test_regress/t/t_cover_lib__1.out
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@ -1,7 +1,7 @@
# SystemC::Coverage-3
C 'f../../t/t_cover_lib_c.cppl39pagesp_user/t_cover_lib_cP0htop.a*.pi' 500
C 'f../../t/t_cover_lib_c.cppl39pagesp_user/t_cover_lib_cP1htop.a0.npi' 200
C 'f../../t/t_cover_lib_c.cppl39pagesp_user/t_cover_lib_cP1htop.a1.npi' 300
C 'f../../t/t_cover_lib_c.cppl48pagesp_user/t_cover_lib_cokept_onehmain' 100
C 'f../../t/t_cover_lib_c.cppl49pagesp_user/t_cover_lib_cokept_twohmain' 210
C 'f../../t/t_cover_lib_c.cppl50pagesp_user/t_cover_lib_colost_threehmain' 220
C 'f../../t/t_cover_lib_c.cppl39t_userpagesp_user/t_cover_lib_cP0htop.a*.pi' 500
C 'f../../t/t_cover_lib_c.cppl39t_userpagesp_user/t_cover_lib_cP1htop.a0.npi' 200
C 'f../../t/t_cover_lib_c.cppl39t_userpagesp_user/t_cover_lib_cP1htop.a1.npi' 300
C 'f../../t/t_cover_lib_c.cppl48t_userpagesp_user/t_cover_lib_cokept_onehmain' 100
C 'f../../t/t_cover_lib_c.cppl49t_userpagesp_user/t_cover_lib_cokept_twohmain' 210
C 'f../../t/t_cover_lib_c.cppl50t_userpagesp_user/t_cover_lib_colost_threehmain' 220

14
test_regress/t/t_cover_lib__1_per_instance.out
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@ -1,8 +1,8 @@
# SystemC::Coverage-3
C 'f../../t/t_cover_lib_c.cppl39pagesp_user/t_cover_lib_cP0htop.a0.pi' 200
C 'f../../t/t_cover_lib_c.cppl39pagesp_user/t_cover_lib_cP0htop.a1.pi' 300
C 'f../../t/t_cover_lib_c.cppl39pagesp_user/t_cover_lib_cP1htop.a0.npi' 200
C 'f../../t/t_cover_lib_c.cppl39pagesp_user/t_cover_lib_cP1htop.a1.npi' 300
C 'f../../t/t_cover_lib_c.cppl48pagesp_user/t_cover_lib_cokept_onehmain' 100
C 'f../../t/t_cover_lib_c.cppl49pagesp_user/t_cover_lib_cokept_twohmain' 210
C 'f../../t/t_cover_lib_c.cppl50pagesp_user/t_cover_lib_colost_threehmain' 220
C 'f../../t/t_cover_lib_c.cppl39t_userpagesp_user/t_cover_lib_cP0htop.a0.pi' 200
C 'f../../t/t_cover_lib_c.cppl39t_userpagesp_user/t_cover_lib_cP0htop.a1.pi' 300
C 'f../../t/t_cover_lib_c.cppl39t_userpagesp_user/t_cover_lib_cP1htop.a0.npi' 200
C 'f../../t/t_cover_lib_c.cppl39t_userpagesp_user/t_cover_lib_cP1htop.a1.npi' 300
C 'f../../t/t_cover_lib_c.cppl48t_userpagesp_user/t_cover_lib_cokept_onehmain' 100
C 'f../../t/t_cover_lib_c.cppl49t_userpagesp_user/t_cover_lib_cokept_twohmain' 210
C 'f../../t/t_cover_lib_c.cppl50t_userpagesp_user/t_cover_lib_colost_threehmain' 220

4
test_regress/t/t_cover_lib__2.out
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@ -1,3 +1,3 @@
# SystemC::Coverage-3
C 'f../../t/t_cover_lib_c.cppl48pagesp_user/t_cover_lib_cokept_onehmain' 100
C 'f../../t/t_cover_lib_c.cppl49pagesp_user/t_cover_lib_cokept_twohmain' 210
C 'f../../t/t_cover_lib_c.cppl48t_userpagesp_user/t_cover_lib_cokept_onehmain' 100
C 'f../../t/t_cover_lib_c.cppl49t_userpagesp_user/t_cover_lib_cokept_twohmain' 210

4
test_regress/t/t_cover_lib__3.out
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@ -1,3 +1,3 @@
# SystemC::Coverage-3
C 'f../../t/t_cover_lib_c.cppl48pagesp_user/t_cover_lib_cokept_onehmain' 0
C 'f../../t/t_cover_lib_c.cppl49pagesp_user/t_cover_lib_cokept_twohmain' 0
C 'f../../t/t_cover_lib_c.cppl48t_userpagesp_user/t_cover_lib_cokept_onehmain' 0
C 'f../../t/t_cover_lib_c.cppl49t_userpagesp_user/t_cover_lib_cokept_twohmain' 0

2
test_regress/t/t_cover_main.out
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@ -1,2 +1,2 @@
# SystemC::Coverage-3
C 'ft/t_cover_main.vl9n4pagev_line/toblockS9-11ht' 1
C 'ft/t_cover_main.vl9n4tlinepagev_line/toblockS9-11ht' 1

162
test_regress/t/t_wrapper_context__top0.dat.out
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@ -1,82 +1,82 @@
# SystemC::Coverage-3
C 'ft/t_wrapper_context.vl14n22pagev_toggle/topoclkhtop0.top' 21
C 'ft/t_wrapper_context.vl15n22pagev_toggle/toporsthtop0.top' 2
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[0]htop0.top' 1
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[10]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[11]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[12]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[13]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[14]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[15]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[16]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[17]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[18]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[19]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[1]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[20]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[21]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[22]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[23]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[24]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[25]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[26]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[27]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[28]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[29]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[2]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[30]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[31]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[3]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[4]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[5]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[6]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[7]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[8]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[9]htop0.top' 0
C 'ft/t_wrapper_context.vl17n22pagev_toggle/topostophtop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[0]htop0.top' 10
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[10]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[11]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[12]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[13]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[14]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[15]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[16]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[17]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[18]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[19]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[1]htop0.top' 5
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[20]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[21]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[22]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[23]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[24]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[25]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[26]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[27]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[28]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[29]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[2]htop0.top' 2
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[30]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[31]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[3]htop0.top' 1
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[4]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[5]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[6]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[7]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[8]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22pagev_toggle/topocounter[9]htop0.top' 0
C 'ft/t_wrapper_context.vl19n22pagev_toggle/topodone_ohtop0.top' 1
C 'ft/t_wrapper_context.vl22n4pagev_line/topoblockS22,25-29htop0.top' 1
C 'ft/t_wrapper_context.vl32n4pagev_line/topoblockS32htop0.top' 11
C 'ft/t_wrapper_context.vl33n7pagev_branch/topoifS33-34htop0.top' 1
C 'ft/t_wrapper_context.vl33n8pagev_branch/topoelseS36htop0.top' 10
C 'ft/t_wrapper_context.vl38n4pagev_line/topoblockS38-39htop0.top' 34
C 'ft/t_wrapper_context.vl40n7pagev_branch/topoifS40htop0.top' 0
C 'ft/t_wrapper_context.vl40n8pagev_branch/topoelseS46htop0.top' 34
C 'ft/t_wrapper_context.vl41n11pagev_line/topoelsehtop0.top' 0
C 'ft/t_wrapper_context.vl41n27pagev_expr/topo((counter >= 32'sh5)==0) => 0htop0.top' 0
C 'ft/t_wrapper_context.vl41n27pagev_expr/topo((counter >= 32'sh5)==1 && stop==1) => 1htop0.top' 0
C 'ft/t_wrapper_context.vl41n27pagev_expr/topo(stop==0) => 0htop0.top' 0
C 'ft/t_wrapper_context.vl47n10pagev_branch/topoifS47-49htop0.top' 1
C 'ft/t_wrapper_context.vl47n11pagev_branch/topoelsehtop0.top' 33
C 'ft/t_wrapper_context.vl14n22ttogglepagev_toggle/topoclkhtop0.top' 21
C 'ft/t_wrapper_context.vl15n22ttogglepagev_toggle/toporsthtop0.top' 2
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[0]htop0.top' 1
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[10]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[11]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[12]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[13]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[14]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[15]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[16]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[17]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[18]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[19]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[1]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[20]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[21]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[22]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[23]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[24]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[25]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[26]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[27]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[28]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[29]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[2]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[30]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[31]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[3]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[4]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[5]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[6]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[7]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[8]htop0.top' 0
C 'ft/t_wrapper_context.vl16n22ttogglepagev_toggle/topotrace_number[9]htop0.top' 0
C 'ft/t_wrapper_context.vl17n22ttogglepagev_toggle/topostophtop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[0]htop0.top' 10
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[10]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[11]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[12]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[13]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[14]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[15]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[16]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[17]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[18]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[19]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[1]htop0.top' 5
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[20]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[21]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[22]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[23]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[24]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[25]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[26]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[27]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[28]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[29]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[2]htop0.top' 2
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[30]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[31]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[3]htop0.top' 1
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[4]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[5]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[6]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[7]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[8]htop0.top' 0
C 'ft/t_wrapper_context.vl18n22ttogglepagev_toggle/topocounter[9]htop0.top' 0
C 'ft/t_wrapper_context.vl19n22ttogglepagev_toggle/topodone_ohtop0.top' 1
C 'ft/t_wrapper_context.vl22n4tlinepagev_line/topoblockS22,25-29htop0.top' 1
C 'ft/t_wrapper_context.vl32n4tlinepagev_line/topoblockS32htop0.top' 11
C 'ft/t_wrapper_context.vl33n7tbranchpagev_branch/topoifS33-34htop0.top' 1
C 'ft/t_wrapper_context.vl33n8tbranchpagev_branch/topoelseS36htop0.top' 10
C 'ft/t_wrapper_context.vl38n4tlinepagev_line/topoblockS38-39htop0.top' 34
C 'ft/t_wrapper_context.vl40n7tbranchpagev_branch/topoifS40htop0.top' 0
C 'ft/t_wrapper_context.vl40n8tbranchpagev_branch/topoelseS46htop0.top' 34
C 'ft/t_wrapper_context.vl41n11tlinepagev_line/topoelsehtop0.top' 0
C 'ft/t_wrapper_context.vl41n27texprpagev_expr/topo((counter >= 32'sh5)==0) => 0htop0.top' 0
C 'ft/t_wrapper_context.vl41n27texprpagev_expr/topo((counter >= 32'sh5)==1 && stop==1) => 1htop0.top' 0
C 'ft/t_wrapper_context.vl41n27texprpagev_expr/topo(stop==0) => 0htop0.top' 0
C 'ft/t_wrapper_context.vl47n10tbranchpagev_branch/topoifS47-49htop0.top' 1
C 'ft/t_wrapper_context.vl47n11tbranchpagev_branch/topoelsehtop0.top' 33

162
test_regress/t/t_wrapper_context__top1.dat.out
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@ -1,82 +1,82 @@
# SystemC::Coverage-3
C 'ft/t_wrapper_context.vl14n22pagev_toggle/topoclkhtop1.top' 11
C 'ft/t_wrapper_context.vl15n22pagev_toggle/toporsthtop1.top' 2
C 'ft/t_wrapper_context.vl16n22pagev_toggle/topotrace_number[0]htop1.top' 0
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