Commentary: Changes update
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@ -11,6 +11,11 @@ contributors that suggested or implemented a given issue are shown in []. Thanks
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Verilator 5.045 devel
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==========================
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**Important:**
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* Support #0 delays with IEEE-1800 compliant semantics (#7079). [Geza Lore]
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This may require `-no-sched-zero-delay` to maintain performance vs. previous versions.
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**Other:**
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* Add IEEE 4-state type lint checks (#3645 partial) (#6895). [Jose Drowne]
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@ -46,6 +51,8 @@ Verilator 5.045 devel
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* Optimize more wide operation temporaries with substitution (#6972). [Geza Lore, Testorrent USA, Inc.]
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* Optimize right shifts as clean (#6981). [Geza Lore, Testorrent USA, Inc.]
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* Optimize temporary insertion for concatenations in DFG (#7013). [Geza Lore, Testorrent USA, Inc.]
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* Optimize removing redundant variables during DFG Peephole pass (#7076). [Geza Lore]
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* Optimize additional DFG peephole Shift and Concat patterns (#7077). [Geza Lore]
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* Fix MULTIDRIVEN with task and default driver (#4045) (#6858). [em2machine]
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* Fix parameterized virtual interface references that have no model references (#4286).
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* Fix hierarchical interface/modport issues (#5941) (#6997). [Leela Pakanati]
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@ -69,7 +76,7 @@ Verilator 5.045 devel
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* Fix memory leak in vpi_put_value and vpi_get_value (#6917). [Christian Hecken]
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* Fix segfault after assignment pattern XOR error (#6928) (#6931). [emmettifelts]
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* Fix delayed initial assignment (#6929). [Todd Strader]
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* Fix event triggering (#6932). [Igor Zaworski, Antmicro Ltd.]
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* Fix event triggering (#6932) (#7072). [Igor Zaworski, Antmicro Ltd.]
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* Fix `--top-module` with underscores (#6940). [Christopher Batten]
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* Fix variable randomization to better differ by seed (#6945) (#6956). [Rodrigo Batista de Moraes]
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* Fix null pointer dereference in class member trigger expressions (#6946). [Cameron Waite]
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@ -85,9 +92,11 @@ Verilator 5.045 devel
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* Fix inline foreach constraints on dynamic arrays of class objects (#7030) (#7037). [Yilou Wang]
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* Fix rand_mode() on nested object variables causing Z3 solver error (#7031) (#7034). [Yilou Wang]
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* Fix non-member identifiers used inside constraints (#7033). [Pawel Kojma, Antmicro Ltd.]
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* Fix tracing without module inlining to match with inlining (#7041). [Geza Lore]
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* Fix tracing without module inlining to match with inlining (#7041). [Geza Lore, Testorrent USA, Inc.]
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* Fix scope tree in traces in hierarchical mode (#7042). [Geza Lore, Testorrent USA, Inc.]
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* Fix rand_mode()/constraint_mode() when used as function arguments (#7051) (#7055). [Yilou Wang]
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* Fix constraint_mode()/rand_mode() in constructor being overwritten (#7054). [Yilou Wang]
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* Fix constant propagating DPI-written variables (#7074). [Geza Lore]
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Verilator 5.044 2026-01-01
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@ -1596,6 +1596,8 @@ Summary:
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.. option:: --sched-zero-delay
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.. option:: --no-sched-zero-delay
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Specifies if the generated code should support ``#0`` delays with full IEEE
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1800 standard scheduling semantics. Full ``#0`` support has a simulation
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performance cost. If :vlopt:`--sched-zero-delay` is used, the generated code
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@ -2590,5 +2592,5 @@ The grammar of control commands is as follows:
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.. option:: verilator_lib -module "<modulename>"
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Internal use only. Marks the specified module as being a stub for a library
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created by :option:`--lib-creat` (including when created with
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:option:`--hierarchical`). Required for special internal processing.
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created by :vlopt:`--lib-create` (including when created with
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:vlopt:`--hierarchical`). Required for special internal processing.
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@ -1088,6 +1088,7 @@ sc
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scalared
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sccache
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sccanf
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sched
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seg
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setuphold
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sformat
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