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Define SYSTEMVERILOG, SV_COV_START and other IEEE mandated predefines.

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This commit is contained in:
Wilson Snyder
2013-01-16 19:11:56 -05:00
parent 0437d0abea
commit 2879684f21
6 changed files with 64 additions and 1 deletions
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src/V3PreShell.cpp
+20
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@@ -70,6 +70,26 @@ protected:
s_preprocp->defineCmdLine(prefl,"verilator3", "1"); // LEAK_OK
s_preprocp->defineCmdLine(prefl,"systemc_clock", "/*verilator systemc_clock*/"); // LEAK_OK
s_preprocp->defineCmdLine(prefl,"coverage_block_off", "/*verilator coverage_block_off*/"); // LEAK_OK
if (prefl->language().systemVerilog()) {
// Synthesis compatibility
s_preprocp->defineCmdLine(prefl,"SYSTEMVERILOG", "1"); // LEAK_OK
// IEEE predefined
s_preprocp->defineCmdLine(prefl,"SV_COV_START", "0");
s_preprocp->defineCmdLine(prefl,"SV_COV_STOP", "1");
s_preprocp->defineCmdLine(prefl,"SV_COV_RESET", "2");
s_preprocp->defineCmdLine(prefl,"SV_COV_CHECK", "3");
s_preprocp->defineCmdLine(prefl,"SV_COV_MODULE", "10");
s_preprocp->defineCmdLine(prefl,"SV_COV_HIER", "11");
s_preprocp->defineCmdLine(prefl,"SV_COV_ASSERTION", "20");
s_preprocp->defineCmdLine(prefl,"SV_COV_FSM_STATE", "21");
s_preprocp->defineCmdLine(prefl,"SV_COV_STATEMENT", "22");
s_preprocp->defineCmdLine(prefl,"SV_COV_TOGGLE", "23");
s_preprocp->defineCmdLine(prefl,"SV_COV_OVERFLOW", "-2");
s_preprocp->defineCmdLine(prefl,"SV_COV_ERROR", "-1");
s_preprocp->defineCmdLine(prefl,"SV_COV_NOCOV", "0");
s_preprocp->defineCmdLine(prefl,"SV_COV_OK", "1");
s_preprocp->defineCmdLine(prefl,"SV_COV_PARTIAL", "2");
}
}
}