Deprecate sc_clock

src/V3LinkParse.cpp

@@ -260,6 +260,7 @@ private:
         }
         else if (nodep->attrType() == AstAttrType::VAR_CLOCK) {
             UASSERT_OBJ(m_varp, nodep, "Attribute not attached to variable");
+            nodep->v3warn(DEPRECATED, "sc_clock is deprecated and will be removed");
             m_varp->attrScClocked(true);
             nodep->unlinkFrBack()->deleteTree(); VL_DANGLING(nodep);
         }

test_regress/t/t_clk_first.v

@@ -8,8 +8,8 @@ module t (/*AUTOARG*/
    clk, fastclk
    );
 
-   input clk /*verilator sc_clock*/;
-   input fastclk /*verilator sc_clock*/;
+   input clk;
+   input fastclk;
    reg 	 reset_l;
 
    int cyc;
@@ -32,8 +32,8 @@ module t_clk (/*AUTOARG*/
    clk, fastclk, reset_l
    );
 
-   input clk /*verilator sc_clock*/;
-   input fastclk /*verilator sc_clock*/;
+   input clk;
+   input fastclk;
    input reset_l;
 
    // surefire lint_off STMINI

test_regress/t/t_clk_first_bad.out

@@ -0,0 +1,5 @@
+%Warning-DEPRECATED: t/t_clk_first_deprecated.v:11: sc_clock is deprecated and will be removed
+   input clk /*verilator sc_clock*/ ;
+             ^~~~~~~~~~~~~~~~~~~~~~
+                     ... Use "/* verilator lint_off DEPRECATED */" and lint_on around source to disable this message.
+%Error: Exiting due to

test_regress/t/t_clk_first_bad.pl

@@ -0,0 +1,21 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+scenarios(vlt => 1);
+
+top_filename("t/t_clk_first_deprecated.v");
+
+lint(
+    verilator_flags2 => ["--lint-only"],
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_clk_first_deprecated.pl

@@ -0,0 +1,17 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+scenarios(vlt => 1);
+
+lint(
+    verilator_flags2 => ["--lint-only", "-Wno-DEPRECATED"],
+    );
+
+ok(1);
+1;

test_regress/t/t_clk_first_deprecated.v

@@ -0,0 +1,13 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2003 by Wilson Snyder.
+
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+
+   input clk /*verilator sc_clock*/;
+
+endmodule