Merge from master

This commit is contained in:
Wilson Snyder 2018-03-17 12:03:08 -04:00
commit 1f04d17e77
8 changed files with 18 additions and 19 deletions

1
.gitignore vendored
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@ -23,6 +23,7 @@ dddrun*
doxygen-doc doxygen-doc
gdbrun* gdbrun*
gmon.out gmon.out
ncverilog.history
internals.txt internals.txt
verilator.txt verilator.txt
verilator_bin* verilator_bin*

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@ -13,7 +13,7 @@ The contributors that suggested a given feature are shown in []. Thanks!
**** Fix internals to avoid 'using namespace std'. **** Fix internals to avoid 'using namespace std'.
* Verilator 3.921 devel * Verilator 3.922 2018-03-17
** Support IEEE 1800-2017 as default language. ** Support IEEE 1800-2017 as default language.

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@ -34,6 +34,7 @@ verilator.pc$
verilator_bin.* verilator_bin.*
verilator_coverage_bin.* verilator_coverage_bin.*
.vcsmx_rebuild$ .vcsmx_rebuild$
ncverilog.history
autom4te\.cache/ autom4te\.cache/
nodist/ nodist/
/simv$ /simv$

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@ -49,8 +49,7 @@ private:
AstUser1InUse m_inuser1; AstUser1InUse m_inuser1;
// STATE // STATE
AstNodeModule* m_modp; // Current module AstCell* m_cellp; // Current cell
AstCell* m_cellp; // Current cell
static int debug() { static int debug() {
static int level = -1; static int level = -1;
@ -60,13 +59,6 @@ private:
//int m_debug; int debug() { return m_debug; } //int m_debug; int debug() { return m_debug; }
// VISITORS // VISITORS
virtual void visit(AstNodeModule* nodep) {
UINFO(4," MOD "<<nodep<<endl);
//if (nodep->name() == "t_chg") m_debug = 9; else m_debug=0;
m_modp = nodep;
nodep->iterateChildren(*this);
m_modp = NULL;
}
virtual void visit(AstCell* nodep) { virtual void visit(AstCell* nodep) {
UINFO(4," CELL "<<nodep<<endl); UINFO(4," CELL "<<nodep<<endl);
m_cellp = nodep; m_cellp = nodep;
@ -96,7 +88,7 @@ private:
} else if (nodep->modVarp()->isOutput()) { } else if (nodep->modVarp()->isOutput()) {
AstNode* rhsp = new AstVarXRef (exprp->fileline(), nodep->modVarp(), m_cellp->name(), false); AstNode* rhsp = new AstVarXRef (exprp->fileline(), nodep->modVarp(), m_cellp->name(), false);
AstAssignW* assp = new AstAssignW (exprp->fileline(), exprp, rhsp); AstAssignW* assp = new AstAssignW (exprp->fileline(), exprp, rhsp);
m_modp->addStmtp(assp); m_cellp->addNextHere(assp);
} else if (nodep->modVarp()->isInput()) { } else if (nodep->modVarp()->isInput()) {
// Don't bother moving constants now, // Don't bother moving constants now,
// we'll be pushing the const down to the cell soon enough. // we'll be pushing the const down to the cell soon enough.
@ -104,7 +96,7 @@ private:
(exprp->fileline(), (exprp->fileline(),
new AstVarXRef(exprp->fileline(), nodep->modVarp(), m_cellp->name(), true), new AstVarXRef(exprp->fileline(), nodep->modVarp(), m_cellp->name(), true),
exprp); exprp);
m_modp->addStmtp(assp); m_cellp->addNextHere(assp);
if (debug()>=9) assp->dumpTree(cout," _new: "); if (debug()>=9) assp->dumpTree(cout," _new: ");
} else if (nodep->modVarp()->isIfaceRef() } else if (nodep->modVarp()->isIfaceRef()
|| (VN_IS(nodep->modVarp()->subDTypep(), UnpackArrayDType) || (VN_IS(nodep->modVarp()->subDTypep(), UnpackArrayDType)
@ -115,7 +107,7 @@ private:
const AstVarXRef* xrefp = VN_CAST(exprp, VarXRef); const AstVarXRef* xrefp = VN_CAST(exprp, VarXRef);
if (!refp && !xrefp) exprp->v3fatalSrc("Interfaces: Pin is not connected to a VarRef or VarXRef"); if (!refp && !xrefp) exprp->v3fatalSrc("Interfaces: Pin is not connected to a VarRef or VarXRef");
AstAssignVarScope* assp = new AstAssignVarScope(exprp->fileline(), lhsp, exprp); AstAssignVarScope* assp = new AstAssignVarScope(exprp->fileline(), lhsp, exprp);
m_modp->addStmtp(assp); m_cellp->addNextHere(assp);
} else { } else {
nodep->v3error("Assigned pin is neither input nor output"); nodep->v3error("Assigned pin is neither input nor output");
} }
@ -145,7 +137,6 @@ private:
public: public:
// CONSTUCTORS // CONSTUCTORS
explicit InstVisitor(AstNetlist* nodep) { explicit InstVisitor(AstNetlist* nodep) {
m_modp=NULL;
m_cellp=NULL; m_cellp=NULL;
// //
nodep->accept(*this); nodep->accept(*this);

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@ -53,8 +53,9 @@ private:
// TYPES // TYPES
typedef vl_unordered_map<AstPackage*, AstScope*> PackageScopeMap; typedef vl_unordered_map<AstPackage*, AstScope*> PackageScopeMap;
typedef vl_unordered_map<std::pair<AstVar*, AstScope*>, AstVarScope*> VarScopeMap; // These cannot be unordered unless make a specialized hashing pair (gcc-8)
typedef vl_unordered_set<std::pair<AstVarRef*, AstScope*> > VarRefScopeSet; typedef std::map<std::pair<AstVar*, AstScope*>, AstVarScope*> VarScopeMap;
typedef std::set<std::pair<AstVarRef*, AstScope*> > VarRefScopeSet;
// STATE, inside processing a single module // STATE, inside processing a single module
AstNodeModule* m_modp; // Current module AstNodeModule* m_modp; // Current module

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@ -978,7 +978,12 @@ sub _run {
flush STDERR; flush STDERR;
if (!$param{fails} && $status) { if (!$param{fails} && $status) {
$self->error("Exec of $param{cmd}[0] failed\n"); my $firstline = "";
if (my $fh = IO::File->new("<$param{logfile}")) {
$firstline = $fh->getline;
chomp $firstline;
}
$self->error("Exec of $param{cmd}[0] failed: $firstline\n");
} }
if ($param{fails} && $status) { if ($param{fails} && $status) {
print "(Exec expected to fail, and did.)\n"; print "(Exec expected to fail, and did.)\n";

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@ -15,7 +15,7 @@ compile (
# Override default flags # Override default flags
v_flags => [''], v_flags => [''],
v_other_filenames => ["t_preproc_persist2.v"], v_other_filenames => ["t_preproc_persist2.v"],
verilator_flags => ["-E -P +incdir+t"], verilator_flags => ["-E -P +incdir+t -Mdir $Self->{obj_dir}", ],
verilator_flags2 => ['',], verilator_flags2 => ['',],
verilator_flags3 => ['',], verilator_flags3 => ['',],
verilator_make_gcc => 0, verilator_make_gcc => 0,

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@ -14,7 +14,7 @@ my $stdout_filename = "$Self->{obj_dir}/$Self->{name}__test.vpp";
compile ( compile (
# Override default flags # Override default flags
v_flags => [''], v_flags => [''],
verilator_flags => ["-E -P +incdir+t"], verilator_flags => ["-E -P +incdir+t -Mdir $Self->{obj_dir}", ],
verilator_flags2 => ['',], verilator_flags2 => ['',],
verilator_flags3 => ['',], verilator_flags3 => ['',],
verilator_make_gcc => 0, verilator_make_gcc => 0,