Support --bbox-unsup of $cast

src/V3AstNodes.h

@@ -5595,6 +5595,29 @@ public:
     AstNodeDType* childDTypep() const { return VN_CAST(op2p(), NodeDType); }
 };
 
+class AstCastDynamic : public AstNodeBiop {
+public:
+    AstCastDynamic(FileLine* fl, AstNode* lhsp, AstNode* rhsp)
+        : ASTGEN_SUPER(fl, lhsp, rhsp) {}
+    ASTNODE_NODE_FUNCS(CastDynamic)
+    virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) {
+        V3ERROR_NA;
+    }
+    virtual AstNode* cloneType(AstNode* lhsp, AstNode* rhsp) {
+        return new AstCastDynamic(this->fileline(), lhsp, rhsp);
+    }
+    virtual string emitVerilog() { return "%f$cast(%r, %l)"; }
+    // Non-existent filehandle returns EOF
+    virtual string emitC() { V3ERROR_NA_RETURN(""); }
+    virtual bool cleanOut() const { return true; }
+    virtual bool cleanLhs() const { return true; }
+    virtual bool cleanRhs() const { return true; }
+    virtual bool sizeMattersLhs() const { return false; }
+    virtual bool sizeMattersRhs() const { return false; }
+    virtual int instrCount() const { return widthInstrs() * 20; }
+    virtual bool isPure() const { return true; }
+};
+
 class AstCastParse : public AstNode {
     // Cast to appropriate type, where we haven't determined yet what the data type is
 public:

src/V3Width.cpp

@@ -1468,6 +1468,15 @@ private:
         nodep->dtypep(iterateEditDTypep(nodep, nodep->subDTypep()));
         nodep->widthFromSub(nodep->subDTypep());
     }
+    virtual void visit(AstCastDynamic* nodep) VL_OVERRIDE {
+        if (!v3Global.opt.bboxUnsup()) {
+            nodep->v3error("Unsupported: $cast. Suggest try static cast.");
+        }
+        AstNode* newp = new AstConst(nodep->fileline(), 1);
+        newp->dtypeSetSigned32();  // Spec says integer return
+        nodep->replaceWith(newp);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
+    }
     virtual void visit(AstCastParse* nodep) VL_OVERRIDE {
         // nodep->dtp could be data type, or a primary_constant
         // Don't iterate lhsp, will deal with that once convert the type

src/verilog.l

@@ -193,6 +193,7 @@ vnum    {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
   "$atanh"              { FL; return yD_ATANH; }
   "$bitstoreal"         { FL; return yD_BITSTOREAL; }
   "$bitstoshortreal"    { FL; return yD_BITSTOSHORTREAL; }
+  "$cast"               { FL; return yD_CAST; }
   "$ceil"               { FL; return yD_CEIL; }
   "$cos"                { FL; return yD_COS; }
   "$cosh"               { FL; return yD_COSH; }

src/verilog.y

@@ -658,6 +658,7 @@ class AstSenTree;
 %token<fl>              yD_BITSTOREAL   "$bitstoreal"
 %token<fl>              yD_BITSTOSHORTREAL "$bitstoshortreal"
 %token<fl>              yD_C            "$c"
+%token<fl>              yD_CAST         "$cast"
 %token<fl>              yD_CEIL         "$ceil"
 %token<fl>              yD_CLOG2        "$clog2"
 %token<fl>              yD_COS          "$cos"
@@ -3507,6 +3508,7 @@ system_f_call_or_t<nodep>:	// IEEE: part of system_tf_call (can be task or func)
 	|	yD_BITS '(' exprOrDataType ',' expr ')'	{ $$ = new AstAttrOf($1,AstAttrType::DIM_BITS,$3,$5); }
 	|	yD_BITSTOREAL '(' expr ')'		{ $$ = new AstBitsToRealD($1,$3); }
 	|	yD_BITSTOSHORTREAL '(' expr ')'		{ $$ = new AstBitsToRealD($1,$3); UNSUPREAL($1); }
+	|	yD_CAST '(' expr ',' expr ')'		{ $$ = new AstCastDynamic($1, $3, $5); }
 	|	yD_CEIL '(' expr ')'			{ $$ = new AstCeilD($1,$3); }
 	|	yD_CLOG2 '(' expr ')'			{ $$ = new AstCLog2($1,$3); }
 	|	yD_COS '(' expr ')'			{ $$ = new AstCosD($1,$3); }

test_regress/t/t_castdyn.out

@@ -0,0 +1,9 @@
+%Error: t/t_castdyn.v:12:11: Unsupported: $cast. Suggest try static cast.
+                           : ... In instance t
+   12 |       i = $cast(a, b);
+      |           ^~~~~
+%Error: t/t_castdyn.v:14:7: Unsupported: $cast. Suggest try static cast.
+                          : ... In instance t
+   14 |       $cast(a, b);
+      |       ^~~~~
+%Error: Exiting due to

test_regress/t/t_castdyn.pl

@@ -0,0 +1,25 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2020 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    fails => $Self->{vlt_all},
+    expect_filename => $Self->{golden_filename},
+    );
+
+#execute(
+#    check_finished => 1,
+#    );
+#
+#file_grep_not("$Self->{obj_dir}/V$Self->{name}__Syms.h", qr/Dead/x);
+
+ok(1);
+1;

test_regress/t/t_castdyn.v

@@ -0,0 +1,18 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/);
+   int i;
+   int a;
+   int b;
+   initial begin
+      i = $cast(a, b);
+      if (i != 1) $stop;
+      $cast(a, b);
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

test_regress/t/t_castdyn_bbox.pl

@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2020 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+top_filename("t/t_castdyn.v");
+
+lint(
+    verilator_flags2 => ['-bbox-unsup'],
+    fails => 0,
+    );
+
+ok(1);
+1;