improve line coverage

src/V3AstNodeExpr.h

@@ -3697,6 +3697,7 @@ public:
         dtypeSetBit();
     }
     ASTGEN_MEMBERS_AstSThroughout;
+    // LCOV_EXCL_START // Lowered in V3AssertProp before these are called
     void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) override {
         out.opLogAnd(lhs, rhs);
     }
@@ -3708,6 +3709,7 @@ public:
     bool cleanRhs() const override { return true; }
     bool sizeMattersLhs() const override { return false; }
     bool sizeMattersRhs() const override { return false; }
+    // LCOV_EXCL_STOP
 };
 class AstSel final : public AstNodeBiop {
     // *Resolved* (tyep checked) multiple bit range extraction. Always const width

src/V3Dfg.cpp

@@ -693,9 +693,10 @@ void DfgVertex::typeCheck(const DfgGraph& dfg) const {
 
     case VDfgType::SAnd:
     case VDfgType::SOr:
-    case VDfgType::SThroughout:
-        UASSERT_OBJ(false, this, "SAnd/SOr/SThroughout should be removed before DFG");
-        return;
+    case VDfgType::SThroughout: {
+        UASSERT_OBJ(false, this, "SAnd/SOr/SThroughout should be removed before DFG");  // LCOV_EXCL_LINE
+        return;  // LCOV_EXCL_LINE
+    }
 
     case VDfgType::LogAnd:
     case VDfgType::LogEq:

test_regress/t/t_sequence_sexpr_throughout_unsup.out

@@ -7,4 +7,8 @@
                                                                : ... note: In instance 't'
    18 |       a |-> (a throughout ((b ##1 c) and (c ##1 b))));
       |                ^~~~~~~~~~
+%Error-UNSUPPORTED: t/t_sequence_sexpr_throughout_unsup.v:22:16: Unsupported: throughout with complex sequence operator
+                                                               : ... note: In instance 't'
+   22 |       a |-> (a throughout (b throughout (b ##1 c))));
+      |                ^~~~~~~~~~
 %Error: Exiting due to

test_regress/t/t_sequence_sexpr_throughout_unsup.v

@@ -17,4 +17,8 @@ module t (
   assert property (@(posedge clk)
       a |-> (a throughout ((b ##1 c) and (c ##1 b))));
 
+  // Unsupported: nested throughout
+  assert property (@(posedge clk)
+      a |-> (a throughout (b throughout (b ##1 c))));
+
 endmodule