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Revert "Fix recursive constant function in $unit scope (V3Scope.cpp:359) (#7174)" (#7178) 

This reverts commit 5d1992ef05.
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Wilson Snyder 2026-03-02 15:07:20 -05:00 committed by GitHub
parent 5d1992ef05
commit 1264184fbb
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1
docs/CONTRIBUTORS
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@ -99,7 +99,6 @@ Ivan Vnučec
Iztok Jeras Iztok Jeras
Jake Merdich Jake Merdich
Jakub Wasilewski Jakub Wasilewski
jalcim
James Bailey James Bailey
James Hanlon James Hanlon
James Hutchinson James Hutchinson

1
src/V3Scope.cpp
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@ -259,7 +259,6 @@ class ScopeVisitor final : public VNVisitor {
clonep = nodep->cloneTree(false); clonep = nodep->cloneTree(false);
} }
nodep->user2p(clonep); nodep->user2p(clonep);
clonep->user2p(clonep); // For recursive self-references after cloneTree
m_scopep->addBlocksp(clonep); m_scopep->addBlocksp(clonep);
// We iterate under the *clone* // We iterate under the *clone*
iterateChildren(clonep); iterateChildren(clonep);

18
test_regress/t/t_func_unit_recursive.py
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@ -1,18 +0,0 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2026 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator')
test.compile()
test.execute()
test.passes()

38
test_regress/t/t_func_unit_recursive.v
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@ -1,38 +0,0 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2026 by jalcim.
// SPDX-License-Identifier: CC0-1.0
// Recursive constant function defined at file scope ($unit).
// Without the V3Scope.cpp fix, this triggers:
// %Error: Internal Error: V3Scope.cpp: No clone for package function
function automatic integer gate_depth;
input integer way;
integer d1, d2, sc, n1, n2;
begin
if (way <= 1) gate_depth = 0;
else if (way <= 4) gate_depth = 1;
else begin
sc = $clog2(way);
n1 = 1 << (sc - 1);
n2 = way - n1;
d1 = gate_depth(n1);
d2 = gate_depth(n2);
gate_depth = ((d1 > d2) ? d1 : d2) + 1;
end
end
endfunction
module t;
localparam D5 = gate_depth(5);
localparam D8 = gate_depth(8);
initial begin
if (D5 !== 2) $stop;
if (D8 !== 2) $stop;
$write("*-* All Finished *-*\n");
$finish;
end
endmodule