[#72179] move SAIF parsing code to driver.py and add it to SAIF testing pipeline
This commit is contained in:
Mateusz Gancarz
parent
94de419932
commit
0e2cf72966
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@ -66,6 +66,142 @@ class staticproperty(property):
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def __get__(self, owner_self, owner_cls):
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return self.fget()
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#######################################################################
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#######################################################################
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# SAIF parser utilities
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class SAIFSignalBit:
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def __init__(self):
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self.last_val = 0
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self.high_time = 0
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self.low_time = 0
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self.transitions = 0
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def aggregate(self, dt, new_val):
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if int(new_val) != int(self.last_val):
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self.transitions += 1
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if self.last_val:
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self.high_time += dt
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self.last_val = new_val
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class SAIFSignal:
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def __init__(self, signal_name, signal_width = 0):
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self.name = signal_name
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self.width = signal_width
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self.last_time = 0
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self.bits = []
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for _ in range(self.width):
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self.bits.append(SAIFSignalBit())
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class VCDToSAIFParser:
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def __init__(self):
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self.signal_definitions = {}
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self.signal_indirections = {}
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self.current_time = 0
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def parse(self, vcd_filename):
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with open(vcd_filename, 'r') as vcd_file:
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for line in vcd_file:
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line = line.strip()
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if not line:
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continue
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match = re.match(r'\$var\s+(\w+)\s+(\d+)\s+(\S+)\s+(\S+)\s*(\S*)\s*\$end', line)
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if match:
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_, signal_width, signal_id, signal_name, _ = match.groups()
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if signal_id in self.signal_indirections:
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continue
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self.signal_indirections[signal_id] = signal_name
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self.signal_definitions[signal_name] = SAIFSignal(signal_name, int(signal_width))
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continue
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match = re.match(r'\#(\d+)', line)
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if match:
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timestamp = match.groups()
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self.current_time = int(timestamp[0])
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continue
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match = re.match(r'b(\d+)\s+(\S+)', line)
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if match:
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value, signal_id = match.groups()
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dt = self.current_time - self.signal_definitions[self.signal_indirections[signal_id]].last_time
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self.signal_definitions[self.signal_indirections[signal_id]].last_time = self.current_time
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index = 0
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for bit in reversed(value):
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self.signal_definitions[self.signal_indirections[signal_id]].bits[index].aggregate(dt, int(bit))
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index += 1
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continue
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match = re.match(r'(\d+)(\S+)', line)
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if match:
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value, signal_id = match.groups()
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dt = self.current_time - self.signal_definitions[self.signal_indirections[signal_id]].last_time
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self.signal_definitions[self.signal_indirections[signal_id]].last_time = self.current_time
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self.signal_definitions[self.signal_indirections[signal_id]].bits[0].aggregate(dt, int(value))
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for _, signal in self.signal_definitions.items():
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for i in range(signal.width):
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if signal.bits[i].last_val == 1:
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signal.bits[i].high_time += self.current_time - signal.last_time
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signal.bits[i].low_time = self.current_time - signal.bits[i].high_time
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class SAIFParser:
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def __init__(self):
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self.signal_definitions = {}
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def parse(self, saif_filename):
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with open(saif_filename, 'r') as saif_file:
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for line in saif_file:
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line = line.strip()
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if not line:
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continue
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match = re.search(r'(\w+)\[*(\d*)\]*\s+(\(T(.+)\))+', line)
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if match:
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signal_name, bit_index, bit_values, _ = match.groups()
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if bit_index == '':
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bit_index = 0
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if signal_name not in self.signal_definitions:
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self.signal_definitions[signal_name] = SAIFSignal(signal_name)
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for _ in range(0, int(bit_index) - self.signal_definitions[signal_name].width + 1):
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self.signal_definitions[signal_name].bits.append(SAIFSignalBit())
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self.signal_definitions[signal_name].width = int(bit_index) + 1
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match = re.search(r'T0 (\d+)', bit_values)
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if match:
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low_time = match.groups()[0]
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self.signal_definitions[signal_name].bits[int(bit_index)].low_time = low_time
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match = re.search(r'T1 (\d+)', bit_values)
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if match:
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high_time = match.groups()[0]
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self.signal_definitions[signal_name].bits[int(bit_index)].high_time = high_time
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match = re.search(r'TC (\d+)', bit_values)
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if match:
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toggle_count = match.groups()[0]
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self.signal_definitions[signal_name].bits[int(bit_index)].transitions = toggle_count
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#######################################################################
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#######################################################################
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@ -2368,9 +2504,38 @@ class VlTest:
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self.fst2vcd(fn1, tmp)
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self.vcd_identical(tmp, fn2)
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def compare_saif_contents(self, first, second):
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# Golden SAIF contents object should have all bits declared, even if zero transitions
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for signal_name, signal in first.signal_definitions.items():
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tested_object_signal = second.signal_definitions[signal_name]
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for bit in range(signal.width):
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golden_bit = signal.bits[bit]
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valid_signal_width = tested_object_signal.width > bit
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if int(golden_bit.transitions) <= 0 and valid_signal_width and int(tested_object_signal.bits[bit].transitions) > 0:
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print(f"{signal.name}[{bit}] (T0 {golden_bit.low_time}) (T1 {golden_bit.high_time}) (TC {golden_bit.transitions})")
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print(f"{signal.name}[{bit}] (T0 {tested_object_signal.bits[bit].low_time}) (T1 {tested_object_signal.bits[bit].high_time}) (TC {tested_object_signal.bits[bit].transitions})")
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self.error("Transitions number mismatch!\n")
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if valid_signal_width:
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tested_bit = tested_object_signal.bits[bit]
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if int(golden_bit.transitions) != int(tested_bit.transitions) or int(golden_bit.high_time) != int(tested_bit.high_time) or int(golden_bit.low_time) != int(tested_bit.low_time):
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print(f"{signal.name}[{bit}] (T0 {golden_bit.low_time}) (T1 {golden_bit.high_time}) (TC {golden_bit.transitions})")
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print(f"{signal.name}[{bit}] (T0 {tested_bit.low_time}) (T1 {tested_bit.high_time}) (TC {tested_bit.transitions})")
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self.error("Signal bit mismatch!\n")
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def saif_identical(self, fn1: str, fn2: str) -> None:
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"""Test if two SAIF files have logically-identical contents"""
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#TODO: implement checking if two SAIF file are logically-identical
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vcd_to_saif_parser = VCDToSAIFParser()
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vcd_to_saif_parser.parse(fn2)
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saif_parser = SAIFParser()
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saif_parser.parse(fn1)
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self.compare_saif_contents(vcd_to_saif_parser, saif_parser)
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def _vcd_read(self, filename: str) -> str:
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data = {}
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@ -0,0 +1,625 @@
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$version Generated by VerilatedVcd $end
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$timescale 1ps $end
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$scope module top $end
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$var wire 1 # clk $end
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$var wire 8 $ state [7:0] $end
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$scope module t $end
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$var wire 1 # clk $end
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$var wire 1 % rst $end
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$var wire 8 $ state [7:0] $end
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$var wire 32 & cyc [31:0] $end
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$scope module c0 $end
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$var wire 1 # clk $end
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$var wire 1 % rst $end
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$var wire 8 $ out [7:0] $end
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$upscope $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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0#
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b00000000 $
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0%
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b00000000000000000000000000000000 &
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#10
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1#
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1%
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b00000000000000000000000000000001 &
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#15
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0#
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#20
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1#
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b00000001 $
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b00000000000000000000000000000010 &
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#25
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0#
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#30
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1#
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b00000010 $
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b00000000000000000000000000000011 &
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#35
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0#
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#40
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1#
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b00000011 $
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b00000000000000000000000000000100 &
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#45
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0#
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#50
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1#
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b00000100 $
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b00000000000000000000000000000101 &
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#55
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0#
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#60
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1#
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b00000101 $
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b00000000000000000000000000000110 &
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#65
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0#
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#70
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1#
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b00000110 $
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b00000000000000000000000000000111 &
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#75
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0#
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#80
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1#
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b00000111 $
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b00000000000000000000000000001000 &
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#85
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0#
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#90
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1#
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b00001000 $
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b00000000000000000000000000001001 &
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#95
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0#
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#100
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1#
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b00001001 $
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b00000000000000000000000000001010 &
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#105
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0#
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#110
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1#
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b00001010 $
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0%
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b00000000000000000000000000001011 &
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#115
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0#
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#120
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1#
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b00000000 $
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1%
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b00000000000000000000000000001100 &
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#125
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0#
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#130
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1#
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b00000001 $
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b00000000000000000000000000001101 &
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#135
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0#
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#140
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1#
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b00000010 $
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b00000000000000000000000000001110 &
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#145
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0#
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#150
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1#
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b00000011 $
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b00000000000000000000000000001111 &
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#155
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0#
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#160
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1#
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b00000100 $
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b00000000000000000000000000010000 &
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0#
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#170
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1#
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b00000101 $
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b00000000000000000000000000010001 &
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0#
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#180
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1#
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b00000110 $
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b00000000000000000000000000010010 &
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0#
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#190
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1#
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b00000111 $
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b00000000000000000000000000010011 &
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#195
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0#
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#200
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1#
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b00001000 $
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b00000000000000000000000000010100 &
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0#
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#210
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1#
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b00001001 $
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b00000000000000000000000000010101 &
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#215
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0#
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#220
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1#
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b00001010 $
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b00000000000000000000000000010110 &
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#225
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0#
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#230
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1#
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b00001011 $
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b00000000000000000000000000010111 &
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#235
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0#
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#240
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1#
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b00001100 $
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b00000000000000000000000000011000 &
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#245
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0#
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#250
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1#
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b00001101 $
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b00000000000000000000000000011001 &
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#255
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0#
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#260
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1#
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b00001110 $
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b00000000000000000000000000011010 &
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#265
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0#
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#270
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1#
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b00001111 $
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b00000000000000000000000000011011 &
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#275
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0#
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#280
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1#
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b00010000 $
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b00000000000000000000000000011100 &
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#285
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0#
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#290
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1#
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b00010001 $
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b00000000000000000000000000011101 &
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#295
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0#
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#300
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1#
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b00010010 $
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b00000000000000000000000000011110 &
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#305
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0#
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#310
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1#
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b00010011 $
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b00000000000000000000000000011111 &
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#315
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0#
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#320
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1#
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b00010100 $
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b00000000000000000000000000100000 &
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#325
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0#
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#330
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1#
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b00010101 $
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b00000000000000000000000000100001 &
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0#
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#340
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1#
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b00010110 $
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b00000000000000000000000000100010 &
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#345
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0#
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#350
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1#
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b00010111 $
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b00000000000000000000000000100011 &
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#355
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0#
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#360
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1#
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b00011000 $
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b00000000000000000000000000100100 &
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#365
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0#
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#370
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1#
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b00011001 $
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b00000000000000000000000000100101 &
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#375
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0#
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#380
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1#
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b00011010 $
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b00000000000000000000000000100110 &
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#385
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0#
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#390
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1#
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b00011011 $
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b00000000000000000000000000100111 &
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#395
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0#
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#400
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1#
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b00011100 $
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b00000000000000000000000000101000 &
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#405
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0#
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#410
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1#
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b00011101 $
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b00000000000000000000000000101001 &
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#415
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0#
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#420
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1#
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b00011110 $
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b00000000000000000000000000101010 &
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#425
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0#
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#430
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1#
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b00011111 $
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b00000000000000000000000000101011 &
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#435
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0#
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#440
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1#
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b00100000 $
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b00000000000000000000000000101100 &
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#445
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0#
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#450
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1#
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b00100001 $
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b00000000000000000000000000101101 &
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#455
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0#
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#460
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1#
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b00100010 $
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b00000000000000000000000000101110 &
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#465
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0#
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#470
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1#
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b00100011 $
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b00000000000000000000000000101111 &
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#475
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0#
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#480
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1#
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b00100100 $
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b00000000000000000000000000110000 &
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#485
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0#
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#490
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1#
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b00100101 $
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b00000000000000000000000000110001 &
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#495
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0#
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#500
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1#
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b00100110 $
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b00000000000000000000000000110010 &
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#505
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0#
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#510
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1#
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b00100111 $
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b00000000000000000000000000110011 &
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#515
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0#
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#520
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1#
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b00101000 $
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b00000000000000000000000000110100 &
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#525
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0#
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#530
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1#
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b00101001 $
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b00000000000000000000000000110101 &
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#535
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0#
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#540
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1#
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b00101010 $
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b00000000000000000000000000110110 &
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#545
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0#
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#550
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1#
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b00101011 $
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b00000000000000000000000000110111 &
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#555
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0#
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#560
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1#
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b00101100 $
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b00000000000000000000000000111000 &
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#565
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0#
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#570
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1#
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b00101101 $
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b00000000000000000000000000111001 &
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#575
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0#
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#580
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1#
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b00101110 $
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b00000000000000000000000000111010 &
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#585
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0#
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#590
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1#
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b00101111 $
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b00000000000000000000000000111011 &
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||||
#595
|
||||
0#
|
||||
#600
|
||||
1#
|
||||
b00110000 $
|
||||
b00000000000000000000000000111100 &
|
||||
#605
|
||||
0#
|
||||
#610
|
||||
1#
|
||||
b00110001 $
|
||||
b00000000000000000000000000111101 &
|
||||
#615
|
||||
0#
|
||||
#620
|
||||
1#
|
||||
b00110010 $
|
||||
b00000000000000000000000000111110 &
|
||||
#625
|
||||
0#
|
||||
#630
|
||||
1#
|
||||
b00110011 $
|
||||
b00000000000000000000000000111111 &
|
||||
#635
|
||||
0#
|
||||
#640
|
||||
1#
|
||||
b00110100 $
|
||||
b00000000000000000000000001000000 &
|
||||
#645
|
||||
0#
|
||||
#650
|
||||
1#
|
||||
b00110101 $
|
||||
b00000000000000000000000001000001 &
|
||||
#655
|
||||
0#
|
||||
#660
|
||||
1#
|
||||
b00110110 $
|
||||
b00000000000000000000000001000010 &
|
||||
#665
|
||||
0#
|
||||
#670
|
||||
1#
|
||||
b00110111 $
|
||||
b00000000000000000000000001000011 &
|
||||
#675
|
||||
0#
|
||||
#680
|
||||
1#
|
||||
b00111000 $
|
||||
b00000000000000000000000001000100 &
|
||||
#685
|
||||
0#
|
||||
#690
|
||||
1#
|
||||
b00111001 $
|
||||
b00000000000000000000000001000101 &
|
||||
#695
|
||||
0#
|
||||
#700
|
||||
1#
|
||||
b00111010 $
|
||||
b00000000000000000000000001000110 &
|
||||
#705
|
||||
0#
|
||||
#710
|
||||
1#
|
||||
b00111011 $
|
||||
b00000000000000000000000001000111 &
|
||||
#715
|
||||
0#
|
||||
#720
|
||||
1#
|
||||
b00111100 $
|
||||
b00000000000000000000000001001000 &
|
||||
#725
|
||||
0#
|
||||
#730
|
||||
1#
|
||||
b00111101 $
|
||||
b00000000000000000000000001001001 &
|
||||
#735
|
||||
0#
|
||||
#740
|
||||
1#
|
||||
b00111110 $
|
||||
b00000000000000000000000001001010 &
|
||||
#745
|
||||
0#
|
||||
#750
|
||||
1#
|
||||
b00111111 $
|
||||
b00000000000000000000000001001011 &
|
||||
#755
|
||||
0#
|
||||
#760
|
||||
1#
|
||||
b01000000 $
|
||||
b00000000000000000000000001001100 &
|
||||
#765
|
||||
0#
|
||||
#770
|
||||
1#
|
||||
b01000001 $
|
||||
b00000000000000000000000001001101 &
|
||||
#775
|
||||
0#
|
||||
#780
|
||||
1#
|
||||
b01000010 $
|
||||
b00000000000000000000000001001110 &
|
||||
#785
|
||||
0#
|
||||
#790
|
||||
1#
|
||||
b01000011 $
|
||||
b00000000000000000000000001001111 &
|
||||
#795
|
||||
0#
|
||||
#800
|
||||
1#
|
||||
b01000100 $
|
||||
b00000000000000000000000001010000 &
|
||||
#805
|
||||
0#
|
||||
#810
|
||||
1#
|
||||
b01000101 $
|
||||
b00000000000000000000000001010001 &
|
||||
#815
|
||||
0#
|
||||
#820
|
||||
1#
|
||||
b01000110 $
|
||||
b00000000000000000000000001010010 &
|
||||
#825
|
||||
0#
|
||||
#830
|
||||
1#
|
||||
b01000111 $
|
||||
b00000000000000000000000001010011 &
|
||||
#835
|
||||
0#
|
||||
#840
|
||||
1#
|
||||
b01001000 $
|
||||
b00000000000000000000000001010100 &
|
||||
#845
|
||||
0#
|
||||
#850
|
||||
1#
|
||||
b01001001 $
|
||||
b00000000000000000000000001010101 &
|
||||
#855
|
||||
0#
|
||||
#860
|
||||
1#
|
||||
b01001010 $
|
||||
b00000000000000000000000001010110 &
|
||||
#865
|
||||
0#
|
||||
#870
|
||||
1#
|
||||
b01001011 $
|
||||
b00000000000000000000000001010111 &
|
||||
#875
|
||||
0#
|
||||
#880
|
||||
1#
|
||||
b01001100 $
|
||||
b00000000000000000000000001011000 &
|
||||
#885
|
||||
0#
|
||||
#890
|
||||
1#
|
||||
b01001101 $
|
||||
b00000000000000000000000001011001 &
|
||||
#895
|
||||
0#
|
||||
#900
|
||||
1#
|
||||
b01001110 $
|
||||
b00000000000000000000000001011010 &
|
||||
#905
|
||||
0#
|
||||
#910
|
||||
1#
|
||||
b01001111 $
|
||||
b00000000000000000000000001011011 &
|
||||
#915
|
||||
0#
|
||||
#920
|
||||
1#
|
||||
b01010000 $
|
||||
b00000000000000000000000001011100 &
|
||||
#925
|
||||
0#
|
||||
#930
|
||||
1#
|
||||
b01010001 $
|
||||
b00000000000000000000000001011101 &
|
||||
#935
|
||||
0#
|
||||
#940
|
||||
1#
|
||||
b01010010 $
|
||||
b00000000000000000000000001011110 &
|
||||
#945
|
||||
0#
|
||||
#950
|
||||
1#
|
||||
b01010011 $
|
||||
b00000000000000000000000001011111 &
|
||||
#955
|
||||
0#
|
||||
#960
|
||||
1#
|
||||
b01010100 $
|
||||
b00000000000000000000000001100000 &
|
||||
#965
|
||||
0#
|
||||
#970
|
||||
1#
|
||||
b01010101 $
|
||||
b00000000000000000000000001100001 &
|
||||
#975
|
||||
0#
|
||||
#980
|
||||
1#
|
||||
b01010110 $
|
||||
b00000000000000000000000001100010 &
|
||||
#985
|
||||
0#
|
||||
#990
|
||||
1#
|
||||
b01010111 $
|
||||
b00000000000000000000000001100011 &
|
||||
#995
|
||||
0#
|
||||
#1000
|
||||
1#
|
||||
b01011000 $
|
||||
b00000000000000000000000001100100 &
|
||||
|
|
@ -1,148 +0,0 @@
|
|||
import re
|
||||
from collections import defaultdict
|
||||
|
||||
class SAIFSignalBit:
|
||||
def __init__(self):
|
||||
self.last_val = 0
|
||||
self.high_time = 0
|
||||
self.low_time = 0
|
||||
self.transitions = 0
|
||||
|
||||
def aggregate(self, dt, new_val):
|
||||
if int(new_val) != int(self.last_val):
|
||||
self.transitions += 1
|
||||
|
||||
if self.last_val:
|
||||
self.high_time += dt
|
||||
|
||||
self.last_val = new_val
|
||||
|
||||
class SAIFSignal:
|
||||
def __init__(self, signal_name, signal_width = 0):
|
||||
self.name = signal_name
|
||||
self.width = signal_width
|
||||
self.last_time = 0
|
||||
|
||||
self.bits = []
|
||||
for _ in range(self.width):
|
||||
self.bits.append(SAIFSignalBit())
|
||||
|
||||
|
||||
class VCDToSAIFParser:
|
||||
def __init__(self):
|
||||
self.signal_definitions = {}
|
||||
self.signal_indirections = {}
|
||||
self.current_time = 0
|
||||
|
||||
def parse(self, vcd_filename):
|
||||
with open(vcd_filename, 'r') as vcd_file:
|
||||
for line in vcd_file:
|
||||
line = line.strip()
|
||||
if not line:
|
||||
continue
|
||||
|
||||
match = re.match(r'\$var\s+(\w+)\s+(\d+)\s+(\S+)\s+(\S+)\s*(\S*)\s*\$end', line)
|
||||
if match:
|
||||
_, signal_width, signal_id, signal_name, _ = match.groups()
|
||||
self.signal_indirections[signal_id] = signal_name
|
||||
self.signal_definitions[signal_name] = SAIFSignal(signal_name, int(signal_width))
|
||||
continue
|
||||
|
||||
match = re.match(r'\#(\d+)', line)
|
||||
if match:
|
||||
timestamp = match.groups()
|
||||
self.current_time = int(timestamp[0])
|
||||
continue
|
||||
|
||||
match = re.match(r'b(\d+)\s+(\S+)', line)
|
||||
if match:
|
||||
value, signal_id = match.groups()
|
||||
|
||||
dt = self.current_time - self.signal_definitions[self.signal_indirections[signal_id]].last_time
|
||||
self.signal_definitions[self.signal_indirections[signal_id]].last_time = self.current_time
|
||||
|
||||
index = 0
|
||||
for bit in reversed(value):
|
||||
self.signal_definitions[self.signal_indirections[signal_id]].bits[index].aggregate(dt, int(bit))
|
||||
index += 1
|
||||
|
||||
continue
|
||||
|
||||
match = re.match(r'(\d+)(\S+)', line)
|
||||
if match:
|
||||
value, signal_id = match.groups()
|
||||
|
||||
dt = self.current_time - self.signal_definitions[self.signal_indirections[signal_id]].last_time
|
||||
self.signal_definitions[self.signal_indirections[signal_id]].last_time = self.current_time
|
||||
|
||||
self.signal_definitions[self.signal_indirections[signal_id]].bits[0].aggregate(dt, int(value))
|
||||
|
||||
for _, signal in self.signal_definitions.items():
|
||||
for i in range(signal.width):
|
||||
if signal.bits[i].last_val == 1:
|
||||
signal.bits[i].high_time += self.current_time - signal.last_time
|
||||
|
||||
signal.bits[i].low_time = self.current_time - signal.bits[i].high_time
|
||||
|
||||
|
||||
class SAIFParser:
|
||||
def __init__(self):
|
||||
self.signal_definitions = {}
|
||||
|
||||
def parse(self, saif_filename):
|
||||
with open(saif_filename, 'r') as saif_file:
|
||||
for line in saif_file:
|
||||
line = line.strip()
|
||||
if not line:
|
||||
continue
|
||||
|
||||
match = re.search(r'(\w+)\[*(\d*)\]*\s+(\(T(.+)\))+', line)
|
||||
if match:
|
||||
signal_name, bit_index, bit_values, _ = match.groups()
|
||||
|
||||
if bit_index == '':
|
||||
bit_index = 0
|
||||
|
||||
if signal_name not in self.signal_definitions:
|
||||
self.signal_definitions[signal_name] = SAIFSignal(signal_name)
|
||||
|
||||
for _ in range(0, int(bit_index) - self.signal_definitions[signal_name].width + 1):
|
||||
self.signal_definitions[signal_name].bits.append(SAIFSignalBit())
|
||||
|
||||
self.signal_definitions[signal_name].width = int(bit_index) + 1
|
||||
|
||||
match = re.search(r'T0 (\d+)', bit_values)
|
||||
if match:
|
||||
low_time = match.groups()[0]
|
||||
|
||||
self.signal_definitions[signal_name].bits[int(bit_index)].low_time = low_time
|
||||
|
||||
match = re.search(r'T1 (\d+)', bit_values)
|
||||
if match:
|
||||
high_time = match.groups()[0]
|
||||
|
||||
self.signal_definitions[signal_name].bits[int(bit_index)].high_time = high_time
|
||||
|
||||
match = re.search(r'TC (\d+)', bit_values)
|
||||
if match:
|
||||
toggle_count = match.groups()[0]
|
||||
|
||||
self.signal_definitions[signal_name].bits[int(bit_index)].transitions = toggle_count
|
||||
|
||||
vcd_to_saif_parser = VCDToSAIFParser()
|
||||
vcd_to_saif_parser.parse("simx.vcd")
|
||||
|
||||
saif_parser = SAIFParser()
|
||||
saif_parser.parse("simx.saif")
|
||||
|
||||
print("From VCD")
|
||||
for signal_name, signal in vcd_to_saif_parser.signal_definitions.items():
|
||||
for bit in range(signal.width):
|
||||
print(f"{signal.name}[{bit}] (T0 {signal.bits[bit].low_time}) (T1 {signal.bits[bit].high_time}) (TC {signal.bits[bit].transitions})")
|
||||
|
||||
print()
|
||||
|
||||
print("From SAIF")
|
||||
for signal_name, signal in saif_parser.signal_definitions.items():
|
||||
for bit in range(signal.width):
|
||||
print(f"{signal.name}[{bit}] (T0 {signal.bits[bit].low_time}) (T1 {signal.bits[bit].high_time}) (TC {signal.bits[bit].transitions})")
|
||||
Loading…
Reference in New Issue