2024-11-10 16:51:59 +01:00
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2024 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('vlt')
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2025-10-25 16:57:39 +02:00
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test.top_filename = "t/t_opt_balance_cats.v"
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2024-11-10 16:51:59 +01:00
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2025-10-25 16:57:39 +02:00
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test.compile(verilator_flags2=[
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"--stats", "-fno-func-opt", "-fno-func-opt-balance-cat", "-fno-func-opt-split-cat"
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])
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2024-11-10 16:51:59 +01:00
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2024-11-10 18:23:11 +01:00
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test.file_grep_not(test.stats, r'Optimizations, FuncOpt concat trees balances')
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2024-11-10 16:51:59 +01:00
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test.file_grep_not(test.stats, r'Optimizations, FuncOpt concat splits')
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test.passes()
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