verilator/test_regress/t/t_flag_values_bad.py

#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

import vltest_bootstrap

test.scenarios('vlt')

test.lint(verilator_flags2=[
    "--output-split-cfuncs -1", "--output-split-ctrace -1", "--preproc-token-limit 0",
    "--reloop-limit -1"
],
          fails=True,
          expect_filename=test.golden_filename)

test.passes()