2024-09-08 19:00:03 +02:00
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#!/usr/bin/env python3
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2024-05-17 16:38:34 +02:00
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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2026-01-27 02:24:34 +01:00
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of either the GNU Lesser General Public License Version 3
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# or the Perl Artistic License Version 2.0.
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# SPDX-FileCopyrightText: 2024 Wilson Snyder
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2024-05-17 16:38:34 +02:00
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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2024-09-08 19:00:03 +02:00
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import vltest_bootstrap
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2024-09-08 19:00:03 +02:00
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test.scenarios('dist')
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2024-05-17 16:38:34 +02:00
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2025-09-14 14:43:52 +02:00
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if not os.path.exists(test.root + "/.git"):
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2024-09-08 19:00:03 +02:00
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test.skip("Not in a git repository")
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2024-05-17 16:38:34 +02:00
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2024-09-08 19:00:03 +02:00
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test.run(cmd=[
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2025-09-14 14:43:52 +02:00
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"cd " + test.root + "/src/obj_dbg && " + os.environ['MAKE'] +
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2024-09-08 19:00:03 +02:00
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" -j 4 -k -f ../Makefile_obj VL_NOOPT=1 header_cc"
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],
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check_finished=False)
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2024-05-17 16:38:34 +02:00
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2024-09-08 19:00:03 +02:00
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test.passes()
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