2024-03-11 23:56:30 +01:00
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// DESCRIPTION: Verilator: Verilog Test module
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//
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2026-01-27 02:24:34 +01:00
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2024 Wilson Snyder
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2024-03-11 23:56:30 +01:00
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// SPDX-License-Identifier: CC0-1.0
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virtual class Base;
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pure virtual function void pvfunc();
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endclass
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class Bar extends Base;
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// Bad, no implementation of pvfunc
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endclass
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module t;
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initial begin
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Bar obj = new();
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obj.pvfunc();
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$stop;
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end
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endmodule
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