49 lines
1.3 KiB
Systemverilog
49 lines
1.3 KiB
Systemverilog
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module barshift #(parameter depth = 2, localparam width = 2**depth) (
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input [width-1:0] in, input [depth-1:0] shift, output [width-1:0]out);
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// If the following split_array var is removed, ALWCOMBORDER and UNOPTFLAT appear.
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logic [width-1:0] tmp[0:depth]; /*verilator split_var*/
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generate
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for(genvar i = 0; i < depth; ++i) begin
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always_comb
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if (shift[i]) begin
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tmp[i+1] = {tmp[i][(1 << i)-1:0], tmp[i][width-1:(2**i)]};
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end else begin
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tmp[i + 1] = tmp[i];
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end
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end
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endgenerate
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assign tmp[0] = in;
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assign out = tmp[depth];
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endmodule
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module t(/*AUTOARG*/ clk);
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input clk;
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localparam depth = 3;
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localparam width = 2**depth;
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logic [width-1:0] in, out0;
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logic [depth-1:0] shift = 0;
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`ifndef VERILATOR
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// The following variables can not be splitted. will see warnings.
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logic should_show_warning0; /*verilator split_var*/
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logic [1:0][7:0]should_show_warning1; /*verilator split_var*/
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logic [7:0]should_show_warning2[0:1][0:3]; /*verilator split_var*/
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`endif
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// barrel shifter
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barshift #(.depth(depth)) shifter0(.in(in), .out(out0), .shift(shift));
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assign in = 8'b10001110;
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always @(posedge clk) begin
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$display("in:%b shift:%d out:%b", in, shift, out0);
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if (&shift) begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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shift <= shift + 1;
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end
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endmodule
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