108 lines
4.8 KiB
Plaintext
108 lines
4.8 KiB
Plaintext
|
// Generated by verilated_saif
|
||
|
|
(SAIFILE
|
||
|
|
(SAIFVERSION "2.0")
|
||
|
|
(DIRECTION "backward")
|
||
|
|
(PROGRAM_NAME "Verilator")
|
||
|
|
(DIVIDER / )
|
||
|
|
(TIMESCALE 1ps)
|
||
|
|
(DURATION 60)
|
||
|
|
(INSTANCE top
|
||
|
|
(NET
|
||
|
|
(clk (T0 35) (T1 25) (TZ 0) (TX 0) (TB 0) (TC 11))
|
||
|
|
)
|
||
|
|
(INSTANCE $unit
|
||
|
|
(NET
|
||
|
|
(global_bit (T0 0) (T1 60) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
)
|
||
|
|
)
|
||
|
|
(INSTANCE t
|
||
|
|
(NET
|
||
|
|
(clk (T0 35) (T1 25) (TZ 0) (TX 0) (TB 0) (TC 11))
|
||
|
|
(cyc\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(cyc\[1\] (T0 40) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 3))
|
||
|
|
(cyc\[2\] (T0 40) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
(v_strp\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_strp\[1\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_strp_strp\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_strp_strp\[1\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_strp_strp\[2\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_strp_strp\[3\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_unip_strp\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_unip_strp\[1\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arrp\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arrp\[1\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arrp_arrp\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arrp_arrp\[1\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arrp_arrp\[2\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arrp_arrp\[3\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arrp_strp\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arrp_strp\[1\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arrp_strp\[2\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arrp_strp\[3\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arru_arrp[3]\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arru_arrp[3]\[1\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arru_arrp[4]\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arru_arrp[4]\[1\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arru_strp[3]\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arru_strp[3]\[1\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arru_strp[4]\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_arru_strp[4]\[1\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_str32x2\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 7))
|
||
|
|
(v_str32x2\[1\] (T0 20) (T1 40) (TZ 0) (TX 0) (TB 0) (TC 4))
|
||
|
|
(v_str32x2\[2\] (T0 20) (T1 40) (TZ 0) (TX 0) (TB 0) (TC 2))
|
||
|
|
(v_str32x2\[3\] (T0 0) (T1 60) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
(v_str32x2\[4\] (T0 0) (T1 60) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
(v_str32x2\[5\] (T0 0) (T1 60) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
(v_str32x2\[6\] (T0 0) (T1 60) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
(v_str32x2\[7\] (T0 0) (T1 60) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
(v_str32x2\[32\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_str32x2\[33\] (T0 40) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 3))
|
||
|
|
(v_str32x2\[34\] (T0 40) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
(v_enumed\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_enumed\[1\] (T0 40) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 3))
|
||
|
|
(v_enumed\[2\] (T0 40) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
(v_enumed2\[1\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_enumed2\[2\] (T0 40) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 3))
|
||
|
|
(v_enumed2\[3\] (T0 40) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
(v_enumb\[0\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 6))
|
||
|
|
(v_enumb\[1\] (T0 30) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 3))
|
||
|
|
(v_enumb\[2\] (T0 20) (T1 40) (TZ 0) (TX 0) (TB 0) (TC 2))
|
||
|
|
(v_enumb2_str\[0\] (T0 40) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 5))
|
||
|
|
(v_enumb2_str\[1\] (T0 40) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 3))
|
||
|
|
(v_enumb2_str\[2\] (T0 20) (T1 40) (TZ 0) (TX 0) (TB 0) (TC 2))
|
||
|
|
(v_enumb2_str\[3\] (T0 40) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 5))
|
||
|
|
(v_enumb2_str\[4\] (T0 40) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 3))
|
||
|
|
(v_enumb2_str\[5\] (T0 20) (T1 40) (TZ 0) (TX 0) (TB 0) (TC 2))
|
||
|
|
)
|
||
|
|
(INSTANCE a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed
|
||
|
|
(NET
|
||
|
|
(PARAM\[2\] (T0 0) (T1 60) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
)
|
||
|
|
)
|
||
|
|
(INSTANCE p2
|
||
|
|
(NET
|
||
|
|
(PARAM\[1\] (T0 0) (T1 60) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
)
|
||
|
|
)
|
||
|
|
(INSTANCE p3
|
||
|
|
(NET
|
||
|
|
(PARAM\[0\] (T0 0) (T1 60) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
(PARAM\[1\] (T0 0) (T1 60) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
)
|
||
|
|
)
|
||
|
|
(INSTANCE unnamedblk1
|
||
|
|
(NET
|
||
|
|
(b\[0\] (T0 10) (T1 50) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
(b\[2\] (T0 10) (T1 50) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
)
|
||
|
|
(INSTANCE unnamedblk2
|
||
|
|
(NET
|
||
|
|
(a\[0\] (T0 10) (T1 50) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
(a\[2\] (T0 10) (T1 50) (TZ 0) (TX 0) (TB 0) (TC 1))
|
||
|
|
)
|
||
|
|
)
|
||
|
|
)
|
||
|
|
)
|
||
|
|
)
|
||
|
|
)
|