2025-11-05 13:14:03 +01:00
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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2025-11-19 17:08:42 +01:00
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# Copyright 2025 by Wilson Snyder. This program is free software; you
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2025-11-05 13:14:03 +01:00
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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2025-11-19 17:08:42 +01:00
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test.scenarios('simulator')
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if not test.have_solver:
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test.skip("No constraint solver installed")
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test.compile()
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test.execute()
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test.passes()
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