mirror of
https://github.com/zachjs/sv2v.git
synced 2026-09-08 12:53:12 +02:00
16 lines
309 B
Verilog
16 lines
309 B
Verilog
module top;
|
|
function [2:0] f;
|
|
input [2:0] n;
|
|
f = n + 4;
|
|
endfunction
|
|
task t;
|
|
begin
|
|
$display("hello");
|
|
$display("world");
|
|
end
|
|
endtask
|
|
initial t();
|
|
initial $display("f(0) = ", f(0));
|
|
initial $display("f(1) = ", f(1));
|
|
endmodule
|