mirror of https://github.com/zachjs/sv2v.git
38 lines
857 B
Systemverilog
38 lines
857 B
Systemverilog
module mod(input [1:0] x [3]);
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initial #1 $display("%b %b %b", x[0], x[1], x[2]);
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endmodule
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module top;
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logic [1:0] a [3];
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logic [1:0] b [3];
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always_comb a = b;
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logic x;
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logic [1:0] c [3];
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logic [1:0] d [3];
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logic [1:0] e [3];
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logic [1:0] f [3];
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initial x = 0;
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assign c = x ? d : !x ? e : f;
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logic [1:0] l [3];
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logic [1:0] m [3];
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logic [1:0] n [3];
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initial begin
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x = 1;
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{l[0], l[1], l[2]} = { 2'bXZ, 2'b01, 2'b10 };
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{m[0], m[1], m[2]} = { 2'b01, 2'b10, 2'b11 };
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{n[0], n[1], n[2]} = { 2'b10, 2'b00, 2'b10 };
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end
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mod mod(!x ? l : x ? m : n);
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generate
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begin : A
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logic [1:0] c [3];
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logic [1:0] d [3];
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end
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endgenerate
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assign A.d = '{ default: 0 };
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initial $display("%b %b", A.c[0], A.d[0]);
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endmodule
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