mirror of https://github.com/zachjs/sv2v.git
17 lines
466 B
Systemverilog
17 lines
466 B
Systemverilog
`include "string_param.vh"
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module Example(inp, out);
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parameter PATTERN = "whatever";
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parameter UNUSED = 0;
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localparam IN_WIDTH = $bits(PATTERN);
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localparam OUT_WIDTH = `COUNT_ONES(PATTERN);
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input [IN_WIDTH - 1:0] inp;
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output [OUT_WIDTH - 1:0] out;
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if (PATTERN[0])
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assign out[0] = inp[0];
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for (genvar j = 1; j < IN_WIDTH; ++j)
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if (PATTERN[j])
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assign out[`COUNT_ONES(PATTERN[j - 1:0])] = inp[j];
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endmodule
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