mirror of https://github.com/zachjs/sv2v.git
85 lines
2.9 KiB
Systemverilog
85 lines
2.9 KiB
Systemverilog
`define CASE(name, dims, a, b, c) \
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module name(clock, in, out); \
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input wire clock, in; \
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output logic dims out; \
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initial out[0+a] = 0; \
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initial out[1+a] = 0; \
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initial out[2+a] = 0; \
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always @(posedge clock) begin \
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\
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out[2+a][4+b][1+c] = out[2+a][4+b][0+c]; \
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out[2+a][4+b][0+c] = out[2+a][3+b][1+c]; \
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out[2+a][3+b][1+c] = out[2+a][3+b][0+c]; \
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out[2+a][3+b][0+c] = out[2+a][2+b][1+c]; \
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out[2+a][2+b][1+c] = out[2+a][2+b][0+c]; \
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out[2+a][2+b][0+c] = out[2+a][1+b][1+c]; \
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out[2+a][1+b][1+c] = out[2+a][1+b][0+c]; \
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out[2+a][1+b][0+c] = out[2+a][0+b][1+c]; \
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out[2+a][0+b][1+c] = out[2+a][0+b][0+c]; \
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out[2+a][0+b][0+c] = out[1+a][4+b][1+c]; \
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\
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out[1+a][4+b][1+c] = out[1+a][4+b][0+c]; \
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out[1+a][4+b][0+c] = out[1+a][3+b][1+c]; \
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out[1+a][3+b][1+c] = out[1+a][3+b][0+c]; \
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out[1+a][3+b][0+c] = out[1+a][2+b][1+c]; \
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out[1+a][2+b][1+c] = out[1+a][2+b][0+c]; \
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out[1+a][2+b][0+c] = out[1+a][1+b][1+c]; \
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out[1+a][1+b][1+c] = out[1+a][1+b][0+c]; \
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out[1+a][1+b][0+c] = out[1+a][0+b][1+c]; \
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out[1+a][0+b][1+c] = out[1+a][0+b][0+c]; \
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out[1+a][0+b][0+c] = out[0+a][4+b][1+c]; \
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\
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out[0+a][4+b][1+c] = out[0+a][4+b][0+c]; \
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out[0+a][4+b][0+c] = out[0+a][3+b][1+c]; \
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out[0+a][3+b][1+c] = out[0+a][3+b][0+c]; \
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out[0+a][3+b][0+c] = out[0+a][2+b][1+c]; \
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out[0+a][2+b][1+c] = out[0+a][2+b][0+c]; \
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out[0+a][2+b][0+c] = out[0+a][1+b][1+c]; \
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out[0+a][1+b][1+c] = out[0+a][1+b][0+c]; \
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out[0+a][1+b][0+c] = out[0+a][0+b][1+c]; \
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out[0+a][0+b][1+c] = out[0+a][0+b][0+c]; \
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out[0+a][0+b][0+c] = in; \
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\
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end \
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endmodule
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`CASE(A1, [2:0][4:0][1:0], 0, 0, 0)
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`CASE(A2, [0:2][0:4][1:0], 0, 0, 0)
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`CASE(A3, [0:2][4:0][1:0], 0, 0, 0)
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`CASE(A4, [2:0][0:4][1:0], 0, 0, 0)
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`CASE(B1, [3:1][5:1][1:0], 1, 1, 0)
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`CASE(B2, [1:3][1:5][1:0], 1, 1, 0)
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`CASE(B3, [1:3][5:1][1:0], 1, 1, 0)
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`CASE(B4, [3:1][1:5][1:0], 1, 1, 0)
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`CASE(C1, [4:2][6:2][1:0], 2, 2, 0)
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`CASE(C2, [2:4][2:6][1:0], 2, 2, 0)
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`CASE(C3, [2:4][6:2][1:0], 2, 2, 0)
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`CASE(C4, [4:2][2:6][1:0], 2, 2, 0)
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`CASE(D1, [5:3][6:2][1:0], 3, 2, 0)
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`CASE(D2, [3:5][2:6][1:0], 3, 2, 0)
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`CASE(D3, [3:5][6:2][1:0], 3, 2, 0)
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`CASE(D4, [5:3][2:6][1:0], 3, 2, 0)
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`CASE(E1, [2:0][4:0][0:1], 0, 0, 0)
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`CASE(E2, [0:2][0:4][0:1], 0, 0, 0)
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`CASE(E3, [0:2][4:0][0:1], 0, 0, 0)
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`CASE(E4, [2:0][0:4][0:1], 0, 0, 0)
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`CASE(F1, [5:3][6:2][1:0], 3, 2, 0)
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`CASE(F2, [3:5][2:6][1:0], 3, 2, 0)
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`CASE(F3, [3:5][6:2][1:0], 3, 2, 0)
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`CASE(F4, [5:3][2:6][1:0], 3, 2, 0)
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`CASE(G1, [5:3][6:2][2:1], 3, 2, 1)
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`CASE(G2, [3:5][2:6][2:1], 3, 2, 1)
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`CASE(G3, [3:5][6:2][2:1], 3, 2, 1)
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`CASE(G4, [5:3][2:6][2:1], 3, 2, 1)
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`CASE(H1, [5:3][6:2][1:2], 3, 2, 1)
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`CASE(H2, [3:5][2:6][1:2], 3, 2, 1)
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`CASE(H3, [3:5][6:2][1:2], 3, 2, 1)
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`CASE(H4, [5:3][2:6][1:2], 3, 2, 1)
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