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package foo_pkg;
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typedef enum logic [2:0] {
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AccessAck = 3'd0,
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AccessAckData = 3'd1
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} inp_t;
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endpackage
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module top;
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import foo_pkg::*;
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wire [2:0] test;
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always_comb begin
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case (test)
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AccessAck: $display("Ack");
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default : $display("default");
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endcase
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end
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endmodule
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