mirror of https://github.com/zachjs/sv2v.git
118 lines
2.9 KiB
Systemverilog
118 lines
2.9 KiB
Systemverilog
module top;
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task skip1;
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$display("HELLO skip1");
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return;
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$display("UNREACHABLE ", `__LINE__);
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endtask
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function void skip2;
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$display("HELLO skip2");
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return;
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$display("UNREACHABLE ", `__LINE__);
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endfunction
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function int skip3;
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$display("HELLO skip3");
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return 1;
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$display("UNREACHABLE ", `__LINE__);
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endfunction
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task skip4;
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for (int i = 0; i < 10; ++i) begin
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$display("HELLO skip4");
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return;
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$display("UNREACHABLE ", `__LINE__);
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end
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$display("UNREACHABLE ", `__LINE__);
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endtask
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task skip5;
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for (int i = 0; i < 10; ++i) begin
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$display("HELLO skip5-1");
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for (int j = 0; j < 10; ++j) begin
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$display("HELLO skip5-2");
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return;
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$display("UNREACHABLE ", `__LINE__);
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end
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$display("UNREACHABLE ", `__LINE__);
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end
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$display("UNREACHABLE ", `__LINE__);
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endtask
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task skip6;
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for (int i = 0; i < 0; ++i) begin
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$display("UNREACHABLE ", `__LINE__);
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return;
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end
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$display("HELLO skip6");
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endtask
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task skip7;
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begin
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parameter x = 1;
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$display("HELLO skip7");
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if (x == 1) return;
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$display("UNREACHABLE ", `__LINE__);
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end
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$display("UNREACHABLE ", `__LINE__);
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endtask
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task skip8;
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begin
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parameter x = 1;
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$display("HELLO skip8-1");
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if (x == 2) return;
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$display("HELLO skip8-2");
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end
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$display("HELLO skip8-3");
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endtask
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initial begin
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skip1;
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skip2;
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$display(skip3());
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skip4;
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skip5;
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skip6;
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skip7;
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skip8;
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end
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initial
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for (int i = 0; i < 10; ++i) begin
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$display("Loop Y:", i);
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continue;
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$display("UNREACHABLE ", `__LINE__);
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end
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initial
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for (int i = 0; i < 10; ++i) begin
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$display("Loop Z:", i);
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break;
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$display("UNREACHABLE ", `__LINE__);
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end
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initial
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for (int i = 0; i < 10; ++i)
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if (i < 5)
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$display("Loop A:", i);
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else
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break;
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initial
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for (int i = 0; i < 10; ++i) begin
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if (i < 3)
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$display("Loop B-1:", i);
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else if (i < 7)
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$display("Loop B-2:", i);
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else begin
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$display("Loop B-3:", i);
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continue;
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$display("UNREACHABLE ", `__LINE__);
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end
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$display("Loop B:", i);
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end
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always #1
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for (int i = 0; i < 10; ++i) begin
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$display("Loop C-1:", i);
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break;
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$display("UNREACHABLE ", `__LINE__);
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end
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initial #5 $finish;
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endmodule
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