mirror of https://github.com/zachjs/sv2v.git
26 lines
561 B
Systemverilog
26 lines
561 B
Systemverilog
package P;
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localparam [31:0] L = 8;
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typedef struct packed {
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logic [L + L[0] + L[1:0] + L[0+:1] - 1:0] x;
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} S;
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endpackage
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module top;
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P::S top;
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logic [2:0] x;
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assign x = '0;
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assign top.x = '1;
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initial begin
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#1;
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$display("%b %b", x, top.x);
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$display("%b %b", x[0], top.x[0]);
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$display("%b %b", x[1:0], top.x[1:0]);
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$display("%b %b", x[0+:1], top.x[0+:1]);
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end
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parameter int Q = 2;
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typedef struct {
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logic [Q-1:0] y;
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} T;
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T y;
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assign y.y = 0;
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endmodule
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