mirror of
https://github.com/zachjs/sv2v.git
synced 2026-08-30 01:18:10 +02:00
Zachary Snow
8eb3a251f7
- full import and export support - simplify AST representation of import and export - allow package-scoped identifiers invoked as subroutines - use scoped name resolution for identifiers in packages - merge package item nesting conversion into package conversion - fix handling of colliding enum items in separate modules - fix visiting enum item exprs in types
8 lines
156 B
Verilog
8 lines
156 B
Verilog
module top;
|
|
localparam X = 1;
|
|
localparam Y = 2;
|
|
localparam A = X;
|
|
localparam B = Y;
|
|
initial $display("%0d %0d %0d", X, A, B);
|
|
endmodule
|