mirror of
https://github.com/zachjs/sv2v.git
synced 2026-08-30 01:18:10 +02:00
Zachary Snow
67466eaa60
- module instances with modport bindings are now inlined - support for modports in generate loops - support for generic interfaces - implied modport instance propagation - add error message for interface instances missing port list
22 lines
521 B
Verilog
22 lines
521 B
Verilog
module top;
|
|
genvar g;
|
|
localparam SOME_VAL = 3;
|
|
generate
|
|
begin : i
|
|
wire x = 0;
|
|
initial $display("Interface %d %d", x, SOME_VAL);
|
|
for (g = 10; g < 15; g = g + 1) begin
|
|
initial $display(g);
|
|
end
|
|
end
|
|
endgenerate
|
|
generate
|
|
begin : m
|
|
initial $display("Module %d", i.x);
|
|
for (g = 0; g < 5; g = g + 1) begin
|
|
initial $display(g);
|
|
end
|
|
end
|
|
endgenerate
|
|
endmodule
|