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Zachary Snow
306d71334b
- use iverilog's -gstrict-expr-width throughout test suite - add warnings for excess bits or padding zeroes in number literals - add new --oversized-numbers parameter to retain support for unsized numbers wider than 32 bits - localized use of oversized numbers to new truncate test suite which verifies the behavior of both modes, and compares against the known behavior of iverilog
6 lines
126 B
Verilog
6 lines
126 B
Verilog
module top;
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localparam X = NUM;
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localparam [63:0] Y = X;
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initial $display("%0d %b %b", $bits(X), X, Y);
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endmodule
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