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13 lines
264 B
Systemverilog
13 lines
264 B
Systemverilog
// pattern: instance m of Module has unconnected interface ports: i
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// location: interface_unbound_modport.sv:11:5
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interface Interface;
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logic x;
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endinterface
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module Module(i);
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Interface i;
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endmodule
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module top;
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Interface i();
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Module m();
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endmodule
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