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Zachary Snow
3eefd03c8d
- general refactoring in decl parsing - restrict charge strength to trireg - require const vars to be initialized - forbid const net declarations - disallow run-on declarations in packages and classes
7 lines
194 B
Systemverilog
7 lines
194 B
Systemverilog
// pattern: for_loop_decl_no_init\.sv:4:23: Parse error: for loop declaration is missing initialization
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module top;
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initial
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for (integer x; x < 3; x = x + 1)
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;
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endmodule
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