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Zachary Snow
c0cb401abe
- disallow using end label alone on blocks - improved parse error for mismatches - add label checking for non-block constructs - allow generate block to have label before begin
7 lines
110 B
Systemverilog
7 lines
110 B
Systemverilog
// pattern: block has only end label "no"
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module top;
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if (1) begin
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wire x;
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end : no
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endmodule
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