mirror of
https://github.com/zachjs/sv2v.git
synced 2026-08-30 01:18:10 +02:00
Zachary Snow
ff0c7b026c
- new net decl to replace net pseudo-type - support nets with complex base types, including typenames - support var declaration type prefix for all data types - support var as lone type shorthand - refactor AST representation of strengths - traversal helpers for treating nets as variables - use decl traversals where appropriate
23 lines
516 B
Systemverilog
23 lines
516 B
Systemverilog
`include "net_or_var.vh"
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module top;
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typedef struct packed {
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logic [3:0] a;
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logic [2:0] b;
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} t;
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`TEST_ALL(logic, logic)
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`TEST_ALL(wire, wire)
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`TEST_ALL(wire logic, wire_logic)
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`TEST_ALL(wand, wand)
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`TEST_ALL(wand logic, wand_logic)
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`TEST_ALL(var, var)
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`TEST_ALL(var logic, var_logic)
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`TEST_ALL(reg, reg)
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`TEST_ALL(var reg, var_reg)
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`TEST_BASE(t, t)
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`TEST_BASE(wire t, wire_t)
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`TEST_BASE(wand t, wand_t)
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`TEST_BASE(var t, var_t)
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endmodule
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