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20 lines
349 B
Verilog
20 lines
349 B
Verilog
module top;
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function f;
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input integer z;
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input integer a;
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begin
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$display(z, a);
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f = z + a;
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end
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endfunction
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task t;
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input integer z;
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input integer a;
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$display(z, a);
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endtask
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initial begin
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$display(f(7, 3));
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t(9, 5);
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end
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endmodule
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