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15 lines
258 B
Systemverilog
15 lines
258 B
Systemverilog
module top;
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logic [4] a, b;
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always b = #5 a;
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initial begin
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a = #1 1;
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$monitor("%2d %b %b", $time, a, b);
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#1; a = 0;
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#1; a = 'he;
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#1;
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#10; a = 'h5;
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#10;
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$finish(0);
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end
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endmodule
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