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15 lines
244 B
Systemverilog
15 lines
244 B
Systemverilog
module top;
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typedef struct packed {
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logic x, y;
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} S;
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typedef struct packed {
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S x, y;
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} T;
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T t;
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initial begin
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t = 1'sb1;
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$display("%b", t);
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$display("%b", 5'(t));
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end
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endmodule
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