10 Commits

Author	SHA1	Message	Date
Zachary Snow	9a38225b1d	several major fixes surrounding packed arrays ... - entirely new PackedArray conversion (always flattens) - typedef and struct correctly order packed ranges when combining types - Stmt LHS traversal no longer traverses nested statements to avoid double conversion - Logic conversion applies to `initial` blocks` - new and modified tests to cover these cases	2019-04-08 21:28:33 -04:00
Zachary Snow	7883e263f9	several conversion bug fixes ... - convert default pattern used to fill a vector - convert Logic in parameter and localparam types - interface conversion should happen early for type resolution later on - interface conversion handles renaming of usages of inlined decls	2019-03-31 15:01:10 -04:00
Zachary Snow	5de77ab62d	fix function and task input types	2019-03-26 23:51:31 -04:00
Zachary Snow	39f6bbb3d8	preliminary support for extern and module/interface lifetimes	2019-03-26 15:10:16 -04:00
Zachary Snow	cecd141e57	revamped support system with most SystemVerilog types and signed types	2019-03-22 17:45:31 -04:00
Zachary Snow	35d8644f2a	fix PackedArray with whole array uses by allowing top-level Expr and LHS traversal	2019-03-18 14:27:14 -04:00
Zachary Snow	9f0857d68e	some fixes for 'VTR' targetted conversions	2019-03-07 20:03:35 -05:00
Zachary Snow	59efba06ac	LHSs are recursive (as they should have been)	2019-03-04 15:16:53 -05:00
Zachary Snow	729a75cd11	support for interfaces; new "declaration parser"	2019-03-04 02:58:00 -05:00
Zachary Snow	7bc81ef67b	directory re-org; streamline build setup	2019-02-28 13:52:31 -05:00