mirror of https://github.com/zachjs/sv2v.git
fix inline explicit struct casts
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0454663901
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fe90c7bbf4
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@ -15,6 +15,7 @@
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* Fixed an issue that prevented parsing tasks and functions with `inout` ports
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* Fixed an issue that prevented parsing tasks and functions with `inout` ports
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* Fixed conflicting genvar names when inlining interfaces and modules that use
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* Fixed conflicting genvar names when inlining interfaces and modules that use
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them; all genvars are now given a design-wide unique name
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them; all genvars are now given a design-wide unique name
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* Fixed unconverted structs within explicit type casts
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* Fixed non-typenames (e.g., from packages or subsequent declarations)
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* Fixed non-typenames (e.g., from packages or subsequent declarations)
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improperly shadowing the names of `struct` pattern fields
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improperly shadowing the names of `struct` pattern fields
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* Fixed failure to resolve typenames suffixed with dimensions in contexts
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* Fixed failure to resolve typenames suffixed with dimensions in contexts
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@ -495,8 +495,11 @@ convertSubExpr scopes (Call e args) =
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(retType, _) = fallbackType scopes e
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(retType, _) = fallbackType scopes e
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args' = convertCall scopes e args
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args' = convertCall scopes e args
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convertSubExpr scopes (Cast (Left t) e) =
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convertSubExpr scopes (Cast (Left t) e) =
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(t, Cast (Left t) e')
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(t', Cast (Left t') e')
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where (_, e') = convertSubExpr scopes e
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where
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e' = convertExpr scopes t $ snd $ convertSubExpr scopes e
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t' = convertType t
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convertSubExpr scopes (Pattern items) =
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convertSubExpr scopes (Pattern items) =
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if all (== Right Nil) $ map fst items'
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if all (== Right Nil) $ map fst items'
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then (UnknownType, Concat $ map snd items')
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then (UnknownType, Concat $ map snd items')
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@ -29,4 +29,20 @@ module top;
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$display("$bits(a.z.x) = %0d", $bits(a.z.x));
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$display("$bits(a.z.x) = %0d", $bits(a.z.x));
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$display("$bits(a.z.y) = %0d", $bits(a.z.y));
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$display("$bits(a.z.y) = %0d", $bits(a.z.y));
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end
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end
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typedef struct packed {
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logic x;
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} U;
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initial begin
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case (U'(0))
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U'(0): $display("1");
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endcase
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if (U'(1))
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$display("2");
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case (U'{x: 0})
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U'{x: 0}: $display("3");
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endcase
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if (U'{x: 1})
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$display("4");
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end
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endmodule
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endmodule
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@ -17,4 +17,11 @@ module top;
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$display("$bits(a.z.x) = %0d", 32);
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$display("$bits(a.z.x) = %0d", 32);
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$display("$bits(a.z.y) = %0d", 8);
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$display("$bits(a.z.y) = %0d", 8);
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end
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end
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initial begin
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$display("1");
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$display("2");
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$display("3");
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$display("4");
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end
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endmodule
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endmodule
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