mirror of https://github.com/zachjs/sv2v.git
package item nesting perf tweaks
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@ -7,13 +7,13 @@
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module Convert.NestPI (convert) where
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import Control.Monad.Writer
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import Data.List.Unique (complex)
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import qualified Data.Map.Strict as Map
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import qualified Data.Set as Set
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import Convert.Traverse
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import Language.SystemVerilog.AST
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type PIs = [(Identifier, PackageItem)]
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type PIs = Map.Map Identifier PackageItem
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type Idents = Set.Set Identifier
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convert :: [AST] -> [AST]
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@ -39,7 +39,7 @@ collectDescriptionM :: Description -> Writer PIs ()
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collectDescriptionM (PackageItem item) = do
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case piName item of
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Nothing -> return ()
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Just ident -> tell [(ident, item)]
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Just ident -> tell $ Map.singleton ident item
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collectDescriptionM _ = return ()
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-- nests packages items missing from modules
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@ -56,10 +56,9 @@ convertDescription pis (orig @ Part{}) =
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, collectExprsM $ collectNestedExprsM collectIdentsM
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]
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neededPIs = Set.difference (Set.union usedPIs imports) existingPIs
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imports = Set.fromList $ map fst $ filter (isImport . snd) pis
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uniq l = l' where (l', _, _) = complex l
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newItems = uniq $ map MIPackageItem $ map snd $
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filter (\(x, _) -> Set.member x neededPIs) pis
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imports = Map.keysSet $ Map.filter isImport pis
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newItems = map MIPackageItem $ Map.elems $
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Map.restrictKeys pis neededPIs
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-- place data declarations at the beginning to obey declaration
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-- ordering; everything else can go at the end
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newItemsBefore = filter isDecl newItems
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