avoid changing Expr codegen in this PR

This commit is contained in:
Zachary Snow 2024-04-20 13:46:21 -04:00
parent 1e86f70219
commit c2b3f63f4b
2 changed files with 4 additions and 6 deletions

View File

@ -94,13 +94,13 @@ severityTaskToString (Subroutine (Ident "$error") _) = severityElabTaskToStrin
severityTaskToString (Subroutine (Ident "$fatal") _) = severityElabTaskToString (ElabTask SeverityFatal (Args [] [])) severityTaskToString (Subroutine (Ident "$fatal") _) = severityElabTaskToString (ElabTask SeverityFatal (Args [] []))
severityTaskToString _ = "" severityTaskToString _ = ""
timeCall :: Expr timeExpr :: Expr
timeCall = Call (Ident "$time") (Args [] []) timeExpr = Ident "$time"
severityTaskToDisplay :: Stmt -> [Stmt] severityTaskToDisplay :: Stmt -> [Stmt]
severityTaskToDisplay task@(Subroutine severity (Args taskArgs [])) = severityTaskToDisplay task@(Subroutine severity (Args taskArgs [])) =
[Subroutine (Ident "$display") (Args ( [Subroutine (Ident "$display") (Args (
[(String ("[%0t] "++(severityTaskToString task)++":"++(trailingSpace))), timeCall] ++ args [(String ("[%0t] "++(severityTaskToString task)++":"++(trailingSpace))), timeExpr] ++ args
) [])] ) [])]
where where
args = parseTaskArgs severity taskArgs args = parseTaskArgs severity taskArgs

View File

@ -24,7 +24,7 @@ module Language.SystemVerilog.AST.Expr
, pattern Mux , pattern Mux
) where ) where
import Data.List (intercalate, isPrefixOf) import Data.List (intercalate)
import Text.Printf (printf) import Text.Printf (printf)
import Language.SystemVerilog.AST.Number (Number(..)) import Language.SystemVerilog.AST.Number (Number(..))
@ -138,8 +138,6 @@ instance Show Expr where
showString " : " . showString " : " .
shows f . shows f .
showChar ')' showChar ')'
showsPrec _ (Call (Ident e) (Args [] [])) | "$" `isPrefixOf` e =
shows (Ident e)
showsPrec _ (Call e l ) = showsPrec _ (Call e l ) =
shows e . shows e .
shows l shows l