mirror of https://github.com/zachjs/sv2v.git
fix conversion of interface-based typedefs
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@ -30,6 +30,8 @@
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whitespace except for the newline which terminates the comment
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* Fix conversion of references to modports nested within types in expressions
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* Fix conversion of module-scoped references to modports
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* Fix conversion of interface-based typedefs when used with explicit modports,
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unpacked arrays, or in designs with multi-dimensional instances
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## v0.0.8
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@ -126,6 +126,7 @@ traverseDeclM decl = do
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isRangeable IntegerAtom{} = False
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isRangeable NonInteger{} = False
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isRangeable TypeOf{} = False
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isRangeable TypedefRef{} = False
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isRangeable _ = True
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traverseGenItemM :: GenItem -> Scoper Type GenItem
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@ -882,7 +882,16 @@ traverseTypeExprsM exprMapper =
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typeOrExprMapper (Right e) = exprMapper e >>= return . Right
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typeMapper (TypeOf expr) =
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exprMapper expr >>= return . TypeOf
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-- TypedefRef is excluded because it isn't really an expression
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-- TypedefRef root is a reference to a port, but the "field" here is
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-- really a typename; this indirection circumvents the interface
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-- expression resolution check and ensures the underlying modport is
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-- appropriately resolved to the corresponding interface instance
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typeMapper (TypedefRef expr) = do
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let Dot inn typ = expr
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let wrap = Dot inn "*"
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wrap' <- exprMapper wrap
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let Dot inn' "*" = wrap'
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return $ TypedefRef $ Dot inn' typ
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typeMapper (CSAlias ps pm xx rs) = do
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vals' <- mapM typeOrExprMapper $ map snd pm
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let pm' = zip (map fst pm) vals'
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@ -16,8 +16,9 @@ import Convert.Traverse
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import Language.SystemVerilog.AST
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convert :: [AST] -> [AST]
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convert = map $ traverseDescriptions $ partScoper
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traverseDeclM traverseModuleItemM traverseGenItemM traverseStmtM
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convert = map $ traverseDescriptions $ evalScoper . scopeModule scoper
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where scoper = scopeModuleItem
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traverseDeclM traverseModuleItemM traverseGenItemM traverseStmtM
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traverseTypeOrExprM :: TypeOrExpr -> Scoper Type TypeOrExpr
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traverseTypeOrExprM (Left (TypeOf (Ident x))) = do
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@ -2,21 +2,36 @@ interface intf_i;
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typedef int data_t;
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endinterface
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module sub(intf_i p, intf_i q [2]);
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interface intf_j;
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typedef logic [1:0] data_t;
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logic dummy;
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modport m(input dummy);
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endinterface
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module sub(interface p, interface q [2]);
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typedef p.data_t p_data_t; // interface based typedef
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typedef q[0].data_t q_data_t; // interface based typedef
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p_data_t p_data;
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q_data_t q_data;
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p_data_t p_data_arr [2];
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q_data_t q_data_arr [2];
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initial begin
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p_data = 1;
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q_data = 2;
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p_data_arr[0] = 2;
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q_data_arr[0] = 2;
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$display("p %0d %b", $bits(p_data), p_data);
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$display("q %0d %b", $bits(q_data), q_data);
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$display("p %0d", $bits(p_data_arr));
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$display("q %0d", $bits(q_data_arr));
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end
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endmodule
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module top;
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intf_i p();
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intf_i q[2]();
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sub s(p, q);
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sub si(p, q);
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intf_j r();
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intf_j s[2]();
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sub sj(r.m, s);
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endmodule
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@ -1,4 +1,10 @@
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module top;
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initial $display("p %0d %b", 32, 32'd1);
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initial $display("q %0d %b", 32, 32'd2);
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initial $display("p %0d", 64);
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initial $display("q %0d", 64);
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initial $display("p %0d %b", 2, 2'd1);
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initial $display("q %0d %b", 2, 2'd2);
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initial $display("p %0d", 4);
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initial $display("q %0d", 4);
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endmodule
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@ -0,0 +1,7 @@
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module poof;
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initial $display("poof");
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endmodule
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module alt;
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poof poof[2][2]();
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endmodule
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`include "interface_based_typedef.sv"
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@ -0,0 +1,7 @@
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module poof;
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initial $display("poof");
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endmodule
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module alt;
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poof poof[0:3]();
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endmodule
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`include "interface_based_typedef.v"
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